Created
August 30, 2019 17:26
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// look in pins.pcf for all the pin names on the TinyFPGA BX board | |
module blink_sos ( | |
input CLK, // 16MHz clock | |
output LED, // User/boot LED next to power LED | |
output USBPU // USB pull-up resistor | |
); | |
// drive USB pull-up resistor to '0' to disable USB | |
assign USBPU = 0; | |
//////// | |
// make a simple blink circuit | |
//////// | |
// keep track of time and location in blink_pattern | |
//reg [25:0] blink_counter; | |
reg [25:0] blink_counter = 25'b0; | |
// needs initial value or test bench values are undefined | |
// pattern that will be flashed over the LED over time | |
wire [31:0] blink_pattern = 32'b101010001110111011100010101; | |
// increment the blink_counter every clock | |
always @(posedge CLK) begin | |
blink_counter <= blink_counter + 1; | |
end | |
// light up the LED according to the pattern | |
assign LED = blink_pattern[ blink_counter[25:21] ]; | |
endmodule |
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`define DUMPSTR(x) `"x.vcd`" | |
// 16MHz = 62.5 ns | |
`timescale 10 ns / 1 ns | |
// look in pins.pcf for all the pin names on the TinyFPGA BX board | |
module blink_sos_tb (); | |
reg CLK; | |
wire LED, USBPU; | |
blink_sos DUT ( CLK, LED, USBPU ); | |
initial begin | |
CLK = 1'b0; | |
forever #6 CLK = ~CLK; // generate a clock | |
end | |
initial begin | |
#4000000000 | |
$finish; | |
end | |
initial begin | |
//-- File were to store the simulation results | |
$dumpfile(`DUMPSTR(`VCD_OUTPUT)); | |
$dumpvars(0, LED); // 0 = Level, all | |
end | |
endmodule |
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