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armv7ar startup
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ENTRY(_start) | |
SECTIONS | |
{ | |
. = 0x0; | |
.ro : { | |
*(.text) | |
*(.rodata) | |
} | |
. = 0x00100000; | |
.rw : { | |
*(.data) | |
*(.bss) | |
*(COMMON) | |
} | |
PROVIDE (end = .); /* for _sbrk */ | |
. = 0x0017f000; | |
PROVIDE(irq_stack_top = .); | |
. = 0x00180000; | |
PROVIDE(initial_sp = .); | |
} |
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.text | |
.global _start | |
.balign 32 | |
_start: | |
b reset_handler | |
_undef: | |
b _undef | |
_svc: | |
b _svc | |
_prefetch_abort: | |
b _prefetch_abort | |
_data_abort: | |
b _data_abort | |
_reserved: | |
b _reserved | |
_irq: | |
b _irq_handler | |
_fiq: | |
b _fiq | |
reset_handler: | |
mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register | |
bic r0, #(1<<13) @ V = 0, vector base = 0x0 | |
mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register | |
/* setup stacks for code and interrupt */ | |
cps #0x12 | |
ldr sp, =irq_stack_top | |
cps #0x13 | |
ldr sp, =initial_sp | |
b c_init | |
_irq_handler: | |
stmfd sp!, {r0-r12, r14} | |
bl c_irq_handler_entry | |
ldmfd sp!, {r0-r12, r14} | |
subs pc, r14, #4 |
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