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dsl400/avr.cfg

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ida config for atmega328p
Raw
avr.cfg
.ATmega328
; Ida avr.cfg (c) THANATOS
SUBARCH=5
RAM=2048
ROM=32768
EEPROM=1024
; MEMORY MAP
; Memory configuration A
area DATA GPWR_ 0x0000:0x0020 General Purpose Working Registers
area DATA FSR_ 0x0020:0x0060 I/O registers
area DATA EXTIO_ 0x0060:0x0100 I/O registers
area DATA I_SRAM 0x0100:0x08ff Internal SRAM
; Interrupt and reset vector assignments
entry __RESET 0x0000 External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset, and JTAG AVR Reset
entry INT0_ 0x0004 External Interrupt Request 0
entry INT1_ 0x0008 External Interrupt Request 1
entry PCINT0_ 0x000C Pin Change Interrupt Request 0
entry PCINT1_ 0x0010 Pin Change Interrupt Request 1
entry PCINT2_ 0x0014 Pin Change Interrupt Request 2
entry WDT 0x0018 Watchdog Time-out Interrupt
entry TIMER2_COMPA 0x001C Timer/Counter2 Compare Match A
entry TIMER2_COMPB 0x0020 Timer/Counter2 Compare Match B
entry TIMER2_OVF 0x0024 Timer/Counter2 Overflow
entry TIMER1_CAPT 0x0028 Timer/Counter1 Compare Match
entry TIMER1_COMPA 0x002C Timer/Counter1 Compare Match A
entry TIMER1_COMPB 0x0030 Timer/Counter1 Compare Match A
entry TIMER1_OVF 0x0034 Timer/Counter1 Overflow
entry TIMER0_COMPA 0x0038 Timer/Counter0 Compare Match A
entry TIMER0_COMPB 0x003c Timer/Counter0 Compare Match B
entry TIMER0_OVF 0x0040 Timer/Counter0 Overflow
entry SPI_STC 0x0044 Serial Transfer Complete
entry USART0_RXC 0x0048 USART Rx Complete
entry USART0_UDRE 0x004c USART Data Register Empty
entry USART0_TXC 0x0050 USART Tx Complete
entry ADC 0x0054 ADC Conversion Complete
entry EE_READY 0x0058 EEPROM Ready
entry ANALOG_COMP 0x005c Analog Comparator
entry TWI 0x0060 2-wire Serial Interface
entry SPM_READY 0x0064 Store Program Memory Ready
ACSR 0x0030 Analog Comparator Control and Status Register
ACSR.ACD 7 Analog Comparator Disable
ACSR.ACBG 6 Analog Comparator Bandgap Select
ACSR.ACO 5 Analog Comparator Output
ACSR.ACI 4 Analog Comparator Interrupt Flag
ACSR.ACIE 3 Analog Comparator Interrupt Enable
ACSR.ACIC 2 Analog Comparator Input Capture Enable
ACSR.ACIS1 1 Analog Comparator Interrupt Mode Select 1
ACSR.ACIS0 0 Analog Comparator Interrupt Mode Select 0
SMCR 0x0033 Sleep Mode Control Register
SMCR.SE 0
SMCR.SM0 1 Sleep Mode Select Bit 0
SMCR.SM1 2 Sleep Mode Select Bit 1
SMCR.SM2 3 Sleep Mode Select Bit 2
MCUSR 0x0034
MCUSR.PORF 0 Power-on Reset Flag
MCUSR.EXTRF 1 External Reset Flag
MCUSR.BORF 2 Brown-out Reset Flag
MCUSR.WDRF 3 Watchdog System Reset Flag
UCSR0B 0x00c1 USART Control and Status Register B
UCSR0B.RXCIE 7 RX Complete Interrupt Enable
UCSR0B.TXCIE 6 TX Complete Interrupt Enable
UCSR0B.UDRIE 5 USART Data Register Empty Interrupt Enable
UCSR0B.RXEN 4 Receiver Enable
UCSR0B.TXEN 3 Transmitter Enable
UCSR0B.UCSZ2 2 Character Size
UCSR0B.RXB8 1 Receive Data Bit 8
UCSR0B.TXB8 0 Transmit Data Bit8
UCSR0A 0x00c0 USART Control and Status Register A
UCSR0A.RXC 7 USART Receive Complete
UCSR0A.TXC 6 USART Transmit Complete
UCSR0A.UDRE 5 USART Data Register Empty
UCSR0A.FE 4 Frame Error
UCSR0A.DOR 3 Data OverRun
UCSR0A.PE 2 Parity Error
UCSR0A.U2X 1 Double the USART Transmission Speed
UCSR0A.MPCM 0 Multi-processor Communication Mode
UDR0 0x00c6 USART I/O Data Register
SPCR 0x002C SPI Control Register-
SPCR.SPIE 7 SPI Interrupt Enable
SPCR.SPE 6 SPI Enable
SPCR.DORD 5 Data Order
SPCR.MSTR 4 Master/Slave Select
SPCR.CPOL 3 Clock Polarity
SPCR.CPHA 2 Clock Phase
SPCR.SPR1 1 SPI Clock Rate Select 1
SPCR.SPR0 0 SPI Clock Rate Select 0
SPSR 0x002D SPI Status Register
SPSR.SPIF 7 SPI Interrupt Flag
SPSR.WCOL 6 Write COLlision Flag
SPSR.SPI2X 0 Double SPI Speed Bit
SPDR 0x002E SPI Data Register
PIND 0x0009 Port D Input Pins Address
PIND.PIND7 7
PIND.PIND6 6
PIND.PIND5 5
PIND.PIND4 4
PIND.PIND3 3
PIND.PIND2 2
PIND.PIND1 1
PIND.PIND0 0
DDRD 0x000A Port D Data Direction Register
DDRD.DDD7 7 Port D Data Direction Register bit 7
DDRD.DDD6 6 Port D Data Direction Register bit 6
DDRD.DDD5 5 Port D Data Direction Register bit 5
DDRD.DDD4 4 Port D Data Direction Register bit 4
DDRD.DDD3 3 Port D Data Direction Register bit 3
DDRD.DDD2 2 Port D Data Direction Register bit 2
DDRD.DDD1 1 Port D Data Direction Register bit 1
DDRD.DDD0 0 Port D Data Direction Register bit 0
PORTD 0x000B Port D Data Register
PORTD.PORTD7 7 Port D Data Register bit 7
PORTD.PORTD6 6 Port D Data Register bit 6
PORTD.PORTD5 5 Port D Data Register bit 5
PORTD.PORTD4 4 Port D Data Register bit 4
PORTD.PORTD3 3 Port D Data Register bit 3
PORTD.PORTD2 2 Port D Data Register bit 2
PORTD.PORTD1 1 Port D Data Register bit 1
PORTD.PORTD0 0 Port D Data Register bit 0
PINC 0x0006 Port C Input Pins Address
PINC.PINC7 7
PINC.PINC6 6
PINC.PINC5 5
PINC.PINC4 4
PINC.PINC3 3
PINC.PINC2 2
PINC.PINC1 1
PINC.PINC0 0
DDRC 0x0007 Port C Data Direction Register
DDRC.DDC7 7 Port C Data Direction Register bit 7
DDRC.DDC6 6 Port C Data Direction Register bit 6
DDRC.DDC5 5 Port C Data Direction Register bit 5
DDRC.DDC4 4 Port C Data Direction Register bit 4
DDRC.DDC3 3 Port C Data Direction Register bit 3
DDRC.DDC2 2 Port C Data Direction Register bit 2
DDRC.DDC1 1 Port C Data Direction Register bit 1
DDRC.DDC0 0 Port C Data Direction Register bit 0
PORTC 0x0008 Port C Data Register
PORTC.PORTC7 7 Port C Data Register bit 7
PORTC.PORTC6 6 Port C Data Register bit 6
PORTC.PORTC5 5 Port C Data Register bit 5
PORTC.PORTC4 4 Port C Data Register bit 4
PORTC.PORTC3 3 Port C Data Register bit 3
PORTC.PORTC2 2 Port C Data Register bit 2
PORTC.PORTC1 1 Port C Data Register bit 1
PORTC.PORTC0 0 Port C Data Register bit 0
PINB 0x0003 Port B Input Pins Address
PINB.PINB7 7
PINB.PINB6 6
PINB.PINB5 5
PINB.PINB4 4
PINB.PINB3 3
PINB.PINB2 2
PINB.PINB1 1
PINB.PINB0 0
DDRB 0x0004 Port B Data Direction Register
DDRB.DDB7 7 Port B Data Direction Register bit 7
DDRB.DDB6 6 Port B Data Direction Register bit 6
DDRB.DDB5 5 Port B Data Direction Register bit 5
DDRB.DDB4 4 Port B Data Direction Register bit 4
DDRB.DDB3 3 Port B Data Direction Register bit 3
DDRB.DDB2 2 Port B Data Direction Register bit 2
DDRB.DDB1 1 Port B Data Direction Register bit 1
DDRB.DDB0 0 Port B Data Direction Register bit 0
PORTB 0x005 Port B Data Register
PORTB.PORTB7 7 Port B Data Register bit 7
PORTB.PORTB6 6 Port B Data Register bit 6
PORTB.PORTB5 5 Port B Data Register bit 5
PORTB.PORTB4 4 Port B Data Register bit 4
PORTB.PORTB3 3 Port B Data Register bit 3
PORTB.PORTB2 2 Port B Data Register bit 2
PORTB.PORTB1 1 Port B Data Register bit 1
PORTB.PORTB0 0 Port B Data Register bit 0
GTCCR 0x0023 General Timer/Counter Control Register
GTCCR.PSRSYNC 0 Prescaler Reset
GTCCR.PSRASY 1 Prescaler Reset Timer/Counter2
GTCCR.TSM 7 Timer/Counter Synchronization Mode
TCCR0A 0x0024 Timer/Counter Control Register A
TCCR0A.COM0A1 7 Compare Match Output A Mode
TCCR0A.COM0A0 6 Compare Match Output A Mode
TCCR0A.COM0B1 5 Compare Match Output B Mode
TCCR0A.COM0B0 4 Compare Match Output B Mode
TCCR0A.WGM01 1 Waveform Generation Mode
TCCR0A.WGM00 0 Waveform Generation Mode
TCCR0B 0x0025 Timer/Counter Control Register B
TCCR0B.FOC0A 7 Force Output Compare A
TCCR0B.FOC0A 6 Force Output Compare A
TCCR0B.WGM02 3 Waveform Generation Mode 2
TCCR0B.CS02 2 Clock Select 2
TCCR0B.CS01 1 Clock Select 1
TCCR0B.CS00 0 Clock Select 0
TCNT0 0x0026 Timer/Counter0
OCR0A 0x0027 Timer/Counter0 Output Compare Register A
OCR0B 0x0028 Timer/Counter0 Output Compare Register A
EECR 0x001F EEPROM Control Register
EECR.EERE 0 EEPROM Read Enable
EECR.EEPE 1 EEPROM Write Enable
EECR.EEMPE 2 EEPROM Master Write Enable
EECR.EERIE 3 EEPROM Ready Interrupt Enable
EECR.EEPM0 4 EEPROM Programming Mode Bit 0
EECR.EEPM1 5 EEPROM Programming Mode Bit 1
EEDR 0x0020 EEPROM Data Register
EEARL 0x0021 EEPROM Address Register Low Byte
EEARH 0x0022 The EEPROM Address Register High
EEARH.EEAR8 8 EEPROM Address 8
UCSR0C 0x00c2 USART Control and Status Register C (page 180)
UCSR0C.URSEL 7 Register Select
UCSR0C.UMSEL 6 USART Mode Select
UCSR0C.UPM1 5 Parity Mode 1
UCSR0C.UPM0 4 Parity Mode 0
UCSR0C.USBS 3 Stop Bit Select
UCSR0C.UCSZ1 2 Character Size 1
UCSR0C.UCSZ0 1 Character Size 0
UCSR0C.UCPOL 0 Clock Polarity
TCNT2 0x00b2 Timer/Counter2
ICR1L 0x0086 Input Capture Register Low Byte
ICR1H 0x0087 Input Capture Register High Byte
ASSR 0x00b6 Asynchronous Status Register
ASSR.AS2 3 Asynchronous Timer/Counter2
ASSR.TCN2UB 2 Timer/Counter2 Update Busy
ASSR.OCR2UB 1 Output Compare Register2 Update Busy
ASSR.TCR2UB 0 Timer/Counter Control Register2 Update Busy
TCCR2A 0x00b0 Timer/Counter Control Register A
TCCR2A.COM2A1 7 Compare Output Mode
TCCR2A.COM2A0 6 Compare Output Mode,
TCCR2A.COM2B1 5 Compare Output Mode,
TCCR2A.COM2B0 4 Compare Output Mode,
TCCR2A.WGM21 1 Waveform Generation Mode 1
TCCR2A.WGM20 0 Waveform Generation Mode 0
OCR1BL 0x008a Output Compare Register B Low Byte
OCR1BH 0x008b Output Compare Register B High Byte
OCR1AL 0x0088 Output Compare Register A Low Byte
OCR1AH 0x0089 Output Compare Register A High Byte
TCNT1L 0x0084 Counter Register Low Byte
TCNT1H 0x0085 Counter Register High Byte
TCCR1B 0x0081 Timer/Counter1 Control Register B
TCCR1B.ICNC1 7 Input Capture Noise Canceler
TCCR1B.ICES1 6 Input CaptureEdgeSelect
TCCR1B.WGM13 4 Waveform Generation Mode 3
TCCR1B.WGM12 3 Waveform Generation Mode 2
TCCR1B.CS12 2 Clock Select 2
TCCR1B.CS11 1 Clock Select 1
TCCR1B.CS10 0 Clock Select 0
TCCR1A 0x0080 Timer/Counter1 Control Register A
TCCR1A.COM1A1 7 Compare Output Mode for channel A 1
TCCR1A.COM1A0 6 Compare Output Mode for channel A 0
TCCR1A.COM1B1 5 Compare Output Mode for channel B 1
TCCR1A.COM1B0 4 Compare Output Mode for channel B 0
TCCR1A.FOC1A 3 Force Output Compare for channel A
TCCR1A.FOC1B 2 Force Output Compare for channel B
TCCR1A.WGM11 1 Waveform Generation Mode 1
TCCR1A.WGM10 0 Waveform Generation Mode 0
SPMCSR 0x0037
SPMCSR.SELFPRGEN 0 Self Programming Enable
SPMCSR.PGERS 1 Page Erase
SPMCSR.PGWRT 2 Page Write
SPMCSR.BLBSET 3 Boot Lock Bit Set
SPMCSR.RWWSRE 4 Read-While-Write Section Read Enable
SPMCSR.RWWSB 6 Read-While-Write Section Busy
SPMCSR.SPMIE 7 SPM Interrupt Enable
MCUCR 0x0035 MCU Control Register
MCUCR.SRE 7 External SRAM/XMEM Enable
MCUCR.SRW10 6 Wait State Select Bit
MCUCR.SE 5 Sleep Enable
MCUCR.SM1 4 Sleep Mode Select Bit 1
MCUCR.ISC11 3 Interrupt Sense Control 1 Bit 1
MCUCR.ISC10 2 Interrupt Sense Control 1 Bit 0
MCUCR.ISC01 1 Interrupt Sense Control 0 Bit 1
MCUCR.ISC00 0 Interrupt Sense Control 0 Bit 0
PCIFR 0x001B Pin Change Interrupt Flag Register
PCIFR.PCIF0 0 Pin Change Interrupt Flag 0
PCIFR.PCIF1 1 Pin Change Interrupt Flag 1
PCIFR.PCIF2 2 Pin Change Interrupt Flag 2
EIFR 0x001C External Interrupt Flag Register
EIFR.INTF0 0 External Interrupt Flag 0
EIFR.INTF1 1 External Interrupt Flag 1
EIMSK 0x001D External Interrupt Mask Register
EIMSK.INT0 0 External Interrupt Request 0 Enable
EIMSK.INT1 1 External Interrupt Request 1 Enable
GPIOR2 0x002B
GPIOR1 0x002A
GPIOR0 0x001E
TIFR0 0x0015 Timer/Counter Interrupt Flag Register
TIFR0.TOV0 0 Timer/Counter0 Overflow Flag
TIFR0.OCF0A 1 Timer/Counter0 Output Compare Flag 0A
TIFR0.OCF0B 2 Timer/Counter0 Output Compare Flag 0B
TIFR1 0x0016 Timer/Counter Interrupt Flag register
TIFR1.TOV1 0 Timer/Counter1 Overflow Flag
TIFR1.OCF1A 1 Output Compare Flag 1A
TIFR1.OCF1B 2 Output Compare Flag 1B
TIFR1.ICF1 5 Input Capture Flag 1
TIFR2 0x0017 Timer/Counter Interrupt Flag Register
TIFR2.TOV2 0 Timer/Counter2 Overflow Flag
TIFR2.OCF2A 1 Output Compare Flag 2A
TIFR2.OCF2B 2 Output Compare Flag 2B
TIMSK0 0x006e Timer/Counter0 Interrupt Mask Register
TIMSK0.OCIE0B 2 Timer/Counter Output Compare Match B Interrupt Enable
TIMSK0.OCIE0A 1 Timer/Counter0 Output Compare Match A Interrupt Enable
TIMSK0.TOIE0 0 Timer/Counter0 Overflow Interrupt Enable
TIMSK1 0x006f Timer/Counter1 Interrupt Mask Register
TIMSK1.ICIE1 5 Timer/Counter1, Input Capture Interrupt Enable
TIMSK1.OCIE1B 2 Timer/Counter Output Compare Match B Interrupt Enable
TIMSK1.OCIE1A 1 Timer/Counter1 Output Compare Match A Interrupt Enable
TIMSK1.TOIE1 0 Timer/Counter1 Overflow Interrupt Enable
TIMSK2 0x0070 Timer/Counter2 Interrupt Mask Register
TIMSK2.OCIE2B 2 Timer/Counter Output Compare Match B Interrupt Enable
TIMSK2.OCIE2A 1 Timer/Counter2 Output Compare Match A Interrupt Enable
TIMSK2.TOIE2 0 Timer/Counter2 Overflow Interrupt Enable
SPL 0x003D Stack Pointer Low
SPL.SP7 7
SPL.SP6 6
SPL.SP5 5
SPL.SP4 4
SPL.SP3 3
SPL.SP2 2
SPL.SP1 1
SPL.SP0 0
SPH 0x003E Stack Pointer High
SPH.SP15 15
SPH.SP14 14
SPH.SP13 13
SPH.SP12 12
SPH.SP11 11
SPH.SP10 10
SPH.SP9 9
SPH.SP8 8
SREG 0x003F Status Register
SREG.I 7 Global Interrupt Enable
SREG.T 6 Bit Copy Storage
SREG.H 5 Half Carry Flag
SREG.S 4 Sign Bit
SREG.V 3 Two s Complement Overflow Flag
SREG.N 2 Negative Flag
SREG.Z 1 Zero Flag
SREG.C 0 CarryFlag
WDTCSR 0x0080 Watchdog Timer Control Register
WDTCSR.WDP0 0 Watch Dog Timer Prescaler bit 0
WDTCSR.WDP1 1 Watch Dog Timer Prescaler bit 1
WDTCSR.WDP2 2 Watch Dog Timer Prescaler bit 2
WDTCSR.WDE 3 Watch Dog Enable
WDTCSR.WDCE 4 Watchdog Change Enable
WDTCSR.WDP3 5 Watchdog Timer Prescaler Bit 3
WDTCSR.WDIE 6 Watchdog Timeout Interrupt Enable
WDTCSR.WDIF 7 Watchdog Timeout Interrupt Flag
CLKPR 0x0061 Clock Prescale Register
CLKPR.CLKPS0 0 Clock Prescaler Select Bit 0
CLKPR.CLKPS1 1 Clock Prescaler Select Bit 1
CLKPR.CLKPS2 2 Clock Prescaler Select Bit 2
CLKPR.CLKPS3 3 Clock Prescaler Select Bit 3
CLKPR.CLKPCE 7 Clock Prescaler Change Enable
PRR 0x0064 Power Reduction Register
PRR.PRADC 0 Power Reduction ADC
PRR.PRUSART0 1 Power Reduction USART
PRR.PRSPI 2 Power Reduction Serial Peripheral Interface
PRR.PRTIM1 3 Power Reduction Timer/Counter1
PRR.PRTIM0 5 Power Reduction Timer/Counter0
PRR.PRTIM2 6 Power Reduction Timer/Counter2
PRR.PRTWI 7 Power Reduction TWI
OSCCAL 0x0066 Oscillator Calibration Value
OSCCAL.CAL0 0 Oscillator Calibration Value Bit0
OSCCAL.CAL1 1 Oscillator Calibration Value Bit1
OSCCAL.CAL2 2 Oscillator Calibration Value Bit2
OSCCAL.CAL3 3 Oscillator Calibration Value Bit3
OSCCAL.CAL4 4 Oscillator Calibration Value Bit4
OSCCAL.CAL5 5 Oscillator Calibration Value Bit5
OSCCAL.CAL6 6 Oscillator Calibration Value Bit6
OSCCAL.CAL7 7 Oscillator Calibration Value Bit7
PCICR 0x0088 Pin Change Interrupt Control Register
PCICR.PCIE0 0 Pin Change Interrupt Enable 0
PCICR.PCIE1 1 Pin Change Interrupt Enable 1
PCICR.PCIE2 2 Pin Change Interrupt Enable 2
EICRA 0x0069 External Interrupt Control Register
EICRA.ISC00 0 External Interrupt Sense Control 0 Bit 0
EICRA.ISC01 1 External Interrupt Sense Control 0 Bit 1
EICRA.ISC10 2 External Interrupt Sense Control 1 Bit 0
EICRA.ISC11 3 External Interrupt Sense Control 1 Bit 1
PCMSK0 0x008b Pin Change Mask Register 0
PCMSK0.PCINT0 0 Pin Change Enable Mask 0
PCMSK0.PCINT1 1 Pin Change Enable Mask 1
PCMSK0.PCINT2 2 Pin Change Enable Mask 2
PCMSK0.PCINT3 3 Pin Change Enable Mask 3
PCMSK0.PCINT4 4 Pin Change Enable Mask 4
PCMSK0.PCINT5 5 Pin Change Enable Mask 5
PCMSK0.PCINT6 6 Pin Change Enable Mask 6
PCMSK0.PCINT7 7 Pin Change Enable Mask 7
PCMSK2 0x006d Pin Change Mask Register 2
PCMSK2.PCINT16 0 Pin Change Enable Mask 16
PCMSK2.PCINT17 1 Pin Change Enable Mask 17
PCMSK2.PCINT18 2 Pin Change Enable Mask 18
PCMSK2.PCINT19 3 Pin Change Enable Mask 19
PCMSK2.PCINT20 4 Pin Change Enable Mask 20
PCMSK2.PCINT21 5 Pin Change Enable Mask 21
PCMSK2.PCINT22 6 Pin Change Enable Mask 22
PCMSK2.PCINT23 7 Pin Change Enable Mask 23
PCMSK1 0x006c Pin Change Mask Register 1
PCMSK1.PCINT8 0 Pin Change Enable Mask 8
PCMSK1.PCINT9 1 Pin Change Enable Mask 9
PCMSK1.PCINT10 2 Pin Change Enable Mask 10
PCMSK1.PCINT11 3 Pin Change Enable Mask 11
PCMSK1.PCINT12 4 Pin Change Enable Mask 12
PCMSK1.PCINT13 5 Pin Change Enable Mask 13
PCMSK1.PCINT14 6 Pin Change Enable Mask 14
ADCL 0x0078 ADC Data Register Low Byte
ADCL.ADCL0 0 ADC Data Register Low Byte Bit 0
ADCL.ADCL1 1 ADC Data Register Low Byte Bit 1
ADCL.ADCL2 2 ADC Data Register Low Byte Bit 2
ADCL.ADCL3 3 ADC Data Register Low Byte Bit 3
ADCL.ADCL4 4 ADC Data Register Low Byte Bit 4
ADCL.ADCL5 5 ADC Data Register Low Byte Bit 5
ADCL.ADCL6 6 ADC Data Register Low Byte Bit 6
ADCL.ADCL7 7 ADC Data Register Low Byte Bit 7
ADCH 0x0079 ADC Data Register High Byte
ADCH.ADCH0 0 ADC Data Register High Byte Bit 0
ADCH.ADCH1 1 ADC Data Register High Byte Bit 1
ADCH.ADCH2 2 ADC Data Register High Byte Bit 2
ADCH.ADCH3 3 ADC Data Register High Byte Bit 3
ADCH.ADCH4 4 ADC Data Register High Byte Bit 4
ADCH.ADCH5 5 ADC Data Register High Byte Bit 5
ADCH.ADCH6 6 ADC Data Register High Byte Bit 6
ADCH.ADCH7 7 ADC Data Register High Byte Bit 7
ADCSRA 0x007a The ADC Control and Status register A
ADCSRA.ADPS0 0 ADC Prescaler Select Bits
ADCSRA.ADPS1 1 ADC Prescaler Select Bits
ADCSRA.ADPS2 2 ADC Prescaler Select Bits
ADCSRA.ADIE 3 ADC Interrupt Enable
ADCSRA.ADIF 4 ADC Interrupt Flag
ADCSRA.ADATE 5 ADC Auto Trigger Enable
ADCSRA.ADSC 6 ADC Start Conversion
ADCSRA.ADEN 7 ADC Enable
ADCSRB 0x007b The ADC Control and Status register B
ADCSRB.ADTS0 0 ADC Auto Trigger Source bit 0
ADCSRB.ADTS1 1 ADC Auto Trigger Source bit 1
ADCSRB.ADTS2 2 ADC Auto Trigger Source bit 2
ADCSRB.ACME 6
ADMUX 0x007c The ADC multiplexer Selection Register
ADMUX.MUX0 0 Analog Channel and Gain Selection Bits
ADMUX.MUX1 1 Analog Channel and Gain Selection Bits
ADMUX.MUX2 2 Analog Channel and Gain Selection Bits
ADMUX.MUX3 3 Analog Channel and Gain Selection Bits
ADMUX.ADLAR 5 Left Adjust Result
ADMUX.REFS0 6 Reference Selection Bit 0
ADMUX.REFS1 7 Reference Selection Bit 1
DIDR0 0x007e Digital Input Disable Register
DIDR0.ADC0D 0
DIDR0.ADC1D 1
DIDR0.ADC2D 2
DIDR0.ADC3D 3
DIDR0.ADC4D 4
DIDR0.ADC5D 5
DIDR1 0x007f Digital Input Disable Register 1
DIDR1.AIN0D 0 AIN0 Digital Input Disable
DIDR1.AIN1D 1 AIN1 Digital Input Disable
TCCR1C 0x0082 Timer/Counter1 Control Register C
TCCR1C.FOC1B 6
TCCR1C.FOC1A 7
TCCR2B 0x00b1 Timer/Counter2 Control Register B
TCCR2B.CS20 0 Clock Select bit 0
TCCR2B.CS21 1 Clock Select bit 1
TCCR2B.CS22 2 Clock Select bit 2
TCCR2B.WGM22 3 Waveform Generation Mode
TCCR2B.FOC2B 6 Force Output Compare B
TCCR2B.FOC2A 7 Force Output Compare A
OCR2A 0x00b3 Timer/Counter2 Output Compare Register A
OCR2A.OCR2A_0 0 Timer/Counter2 Output Compare Register Bit 0
OCR2A.OCR2A_1 1 Timer/Counter2 Output Compare Register Bit 1
OCR2A.OCR2A_2 2 Timer/Counter2 Output Compare Register Bit 2
OCR2A.OCR2A_3 3 Timer/Counter2 Output Compare Register Bit 3
OCR2A.OCR2A_4 4 Timer/Counter2 Output Compare Register Bit 4
OCR2A.OCR2A_5 5 Timer/Counter2 Output Compare Register Bit 5
OCR2A.OCR2A_6 6 Timer/Counter2 Output Compare Register Bit 6
OCR2A.OCR2A_7 7 Timer/Counter2 Output Compare Register Bit 7
OCR2B 0x00b4 Timer/Counter2 Output Compare Register B
OCR2B.OCR2B_0 0 Timer/Counter2 Output Compare Register Bit 0
OCR2B.OCR2B_1 1 Timer/Counter2 Output Compare Register Bit 1
OCR2B.OCR2B_2 2 Timer/Counter2 Output Compare Register Bit 2
OCR2B.OCR2B_3 3 Timer/Counter2 Output Compare Register Bit 3
OCR2B.OCR2B_4 4 Timer/Counter2 Output Compare Register Bit 4
OCR2B.OCR2B_5 5 Timer/Counter2 Output Compare Register Bit 5
OCR2B.OCR2B_6 6 Timer/Counter2 Output Compare Register Bit 6
OCR2B.OCR2B_7 7 Timer/Counter2 Output Compare Register Bit 7
TWBR 0x00b8 TWI Bit Rate register
TWBR.TWBR0 0
TWBR.TWBR1 1
TWBR.TWBR2 2
TWBR.TWBR3 3
TWBR.TWBR4 4
TWBR.TWBR5 5
TWBR.TWBR6 6
TWBR.TWBR7 7
TWSR 0x00b9 TWI Status Register
TWSR.TWPS0 0 TWI Prescaler
TWSR.TWPS1 1 TWI Prescaler
TWSR.TWS3 3 TWI Status
TWSR.TWS4 4 TWI Status
TWSR.TWS5 5 TWI Status
TWSR.TWS6 6 TWI Status
TWSR.TWS7 7 TWI Status
TWAR 0x00ba TWI (Slave) Address register
TWAR.TWGCE 0 TWI General Call Recognition Enable Bit
TWAR.TWA0 1 TWI (Slave) Address register Bit 0
TWAR.TWA1 2 TWI (Slave) Address register Bit 1
TWAR.TWA2 3 TWI (Slave) Address register Bit 2
TWAR.TWA3 4 TWI (Slave) Address register Bit 3
TWAR.TWA4 5 TWI (Slave) Address register Bit 4
TWAR.TWA5 6 TWI (Slave) Address register Bit 5
TWAR.TWA6 7 TWI (Slave) Address register Bit 6
TWDR 0x00bb TWI Data register
TWDR.TWD0 0 TWI Data Register Bit 0
TWDR.TWD1 1 TWI Data Register Bit 1
TWDR.TWD2 2 TWI Data Register Bit 2
TWDR.TWD3 3 TWI Data Register Bit 3
TWDR.TWD4 4 TWI Data Register Bit 4
TWDR.TWD5 5 TWI Data Register Bit 5
TWDR.TWD6 6 TWI Data Register Bit 6
TWDR.TWD7 7 TWI Data Register Bit 7
TWCR 0x00bc TWI Control Register
TWCR.TWIE 0 TWI Interrupt Enable
TWCR.TWEN 2 TWI Enable Bit
TWCR.TWWC 3 TWI Write Collition Flag
TWCR.TWSTO 4 TWI Stop Condition Bit
TWCR.TWSTA 5 TWI Start Condition Bit
TWCR.TWEA 6 TWI Enable Acknowledge Bit
TWCR.TWINT 7 TWI Interrupt Flag
TWAMR 0x00bd TWI (Slave) Address Mask Register
TWAMR.TWAM0 1
TWAMR.TWAM1 2
TWAMR.TWAM2 3
TWAMR.TWAM3 4
TWAMR.TWAM4 5
TWAMR.TWAM5 6
TWAMR.TWAM6 7
UBRR0H 0x00c5 USART Baud Rate Register High Byte
UBRR0H.UBRR8 0 USART Baud Rate Register bit 8
UBRR0H.UBRR9 1 USART Baud Rate Register bit 9
UBRR0H.UBRR10 2 USART Baud Rate Register bit 10
UBRR0H.UBRR11 3 USART Baud Rate Register bit 11
UBRR0L 0x00c4 USART Baud Rate Register Low Byte
UBRR0L._UBRR0 0 USART Baud Rate Register bit 0
UBRR0L._UBRR1 1 USART Baud Rate Register bit 1
UBRR0L.UBRR2 2 USART Baud Rate Register bit 2
UBRR0L.UBRR3 3 USART Baud Rate Register bit 3
UBRR0L.UBRR4 4 USART Baud Rate Register bit 4
UBRR0L.UBRR5 5 USART Baud Rate Register bit 5
UBRR0L.UBRR6 6 USART Baud Rate Register bit 6
UBRR0L.UBRR7 7 USART Baud Rate Register bit 7
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