Created
June 16, 2024 10:47
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dp32g030 demo board program
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#include "demo.bin.h" | |
void main_thunk(void) | |
{ | |
// WARNING: Subroutine does not return | |
main(); | |
} | |
// WARNING: Function: __ARM_common_switch8 replaced with injection: switch8_r3 | |
// WARNING (jumptable): Removing unreachable block (ram,0x0000010a) | |
// WARNING: Removing unreachable block (ram,0x0000010a) | |
void main(void) | |
{ | |
setup_clocks_and_flash(); | |
setup_timer_base0(); | |
setup_gpio(); | |
do { | |
if (999 < count_fast) { | |
count_fast = 0; | |
count_slow = count_slow + 1; | |
} | |
if (4 < count_slow) { | |
count_slow = 0; | |
} | |
switch(count_slow) { | |
case '\0': | |
gpio_set_high(&Peripherals::GPIOA,0); | |
gpio_set_high(&Peripherals::GPIOA,1); | |
gpio_set_low(&Peripherals::GPIOA,2); | |
gpio_set_low(&Peripherals::GPIOA,3); | |
break; | |
case '\x01': | |
gpio_set_low(&Peripherals::GPIOA,0); | |
gpio_set_high(&Peripherals::GPIOA,1); | |
gpio_set_low(&Peripherals::GPIOA,2); | |
gpio_set_low(&Peripherals::GPIOA,3); | |
break; | |
case '\x02': | |
gpio_set_high(&Peripherals::GPIOA,0); | |
gpio_set_low(&Peripherals::GPIOA,1); | |
gpio_set_low(&Peripherals::GPIOA,2); | |
gpio_set_low(&Peripherals::GPIOA,3); | |
break; | |
case '\x03': | |
gpio_set_high(&Peripherals::GPIOA,0); | |
gpio_set_high(&Peripherals::GPIOA,1); | |
gpio_set_high(&Peripherals::GPIOA,2); | |
gpio_set_low(&Peripherals::GPIOA,3); | |
break; | |
case '\x04': | |
gpio_set_high(&Peripherals::GPIOA,0); | |
gpio_set_high(&Peripherals::GPIOA,1); | |
gpio_set_low(&Peripherals::GPIOA,2); | |
gpio_set_high(&Peripherals::GPIOA,3); | |
break; | |
default: | |
} | |
} while( true ); | |
} | |
void setup_gpio_alt(PinAltConfig *config) | |
{ | |
GpioPort GVar1; | |
uint uVar2; | |
uint uVar3; | |
GVar1 = config->port; | |
if (GVar1 == PORTA) { | |
uVar3 = (uint)config->pin; | |
if (uVar3 < 8) { | |
uVar2 = Peripherals::PORTCON.PORTA_SEL0; | |
Peripherals::PORTCON.PORTA_SEL0 = | |
(uint)config->alt << (uVar3 << 2 & 0xff) | uVar2 & ~(0xf << (uVar3 << 2 & 0xff)); | |
} | |
else if (uVar3 < 0x10) { | |
uVar2 = Peripherals::PORTCON.PORTA_SEL1; | |
uVar3 = (uVar3 - 8) * 4; | |
Peripherals::PORTCON.PORTA_SEL1 = | |
(uint)config->alt << (uVar3 & 0xff) | uVar2 & ~(0xf << (uVar3 & 0xff)); | |
} | |
if (config->ie != true) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 & ~(1 << config->pin); | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 | 1 << config->pin; | |
return; | |
} | |
if (GVar1 != PORTB) { | |
if (GVar1 == PORTC) { | |
if (config->pin < 8) { | |
uVar3 = Peripherals::PORTCON.PORTC_SEL0; | |
uVar2 = (uint)config->pin << 2; | |
Peripherals::PORTCON.PORTC_SEL0 = | |
(uint)config->alt << (uVar2 & 0xff) | uVar3 & ~(0xf << (uVar2 & 0xff)); | |
} | |
if (config->ie == true) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 | 1 << config->pin; | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 & ~(1 << config->pin); | |
} | |
return; | |
} | |
uVar3 = (uint)config->pin; | |
if (uVar3 < 8) { | |
uVar2 = Peripherals::PORTCON.PORTB_SEL0; | |
Peripherals::PORTCON.PORTB_SEL0 = | |
(uint)config->alt << (uVar3 << 2 & 0xff) | uVar2 & ~(0xf << (uVar3 << 2 & 0xff)); | |
} | |
else if (uVar3 < 0x10) { | |
uVar2 = Peripherals::PORTCON.PORTB_SEL1; | |
uVar3 = (uVar3 - 8) * 4; | |
Peripherals::PORTCON.PORTB_SEL1 = | |
(uint)config->alt << (uVar3 & 0xff) | uVar2 & ~(0xf << (uVar3 & 0xff)); | |
} | |
if (config->ie != true) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 & ~(1 << config->pin); | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 | 1 << config->pin; | |
return; | |
} | |
void setup_port(PortConfig *param_1) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::PORTCON.PORT_CFG; | |
Peripherals::PORTCON.PORT_CFG = | |
(uint)param_1->hysteresis << 10 | | |
((uint)param_1->drive_c << 4 | | |
((uint)param_1->drive_b << 2 | ((uint)param_1->drive_a | uVar1 & 0xfffffffc) & 0xfffffff3) & | |
0xffffffcf) & 0xfffffbff; | |
return; | |
} | |
void gpio_configure_pin(GPIOA *port,PinConfig *config) | |
{ | |
PinMode PVar1; | |
uint uVar2; | |
uint uVar3; | |
if (port == &Peripherals::GPIOA) { | |
uVar3 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar3 | 1; | |
uVar3 = (uint)config->pin; | |
if (uVar3 < 8) { | |
uVar2 = Peripherals::PORTCON.PORTA_SEL0; | |
Peripherals::PORTCON.PORTA_SEL0 = uVar2 & ~(0xf << ((uVar3 & 0x3f) << 2)); | |
} | |
else if (uVar3 < 0x10) { | |
uVar2 = Peripherals::PORTCON.PORTA_SEL1; | |
Peripherals::PORTCON.PORTA_SEL1 = uVar2 & ~(0xf << ((uVar3 - 8) * 4 & 0xff)); | |
} | |
PVar1 = config->mode; | |
if (PVar1 == INPUT_FLOATING) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTA_PU; | |
Peripherals::PORTCON.PORTA_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PD; | |
Peripherals::PORTCON.PORTA_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_OD; | |
Peripherals::PORTCON.PORTA_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOA.DIR; | |
Peripherals::GPIOA.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_UP) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTA_PU; | |
Peripherals::PORTCON.PORTA_PU = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTA_PD; | |
Peripherals::PORTCON.PORTA_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_OD; | |
Peripherals::PORTCON.PORTA_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOA.DIR; | |
Peripherals::GPIOA.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_DOWN) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTA_PU; | |
Peripherals::PORTCON.PORTA_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PD; | |
Peripherals::PORTCON.PORTA_PD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTA_OD; | |
Peripherals::PORTCON.PORTA_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOA.DIR; | |
Peripherals::GPIOA.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == OUTPUT_PUSH_PULL) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PU; | |
Peripherals::PORTCON.PORTA_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PD; | |
Peripherals::PORTCON.PORTA_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_OD; | |
Peripherals::PORTCON.PORTA_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOA.DIR; | |
Peripherals::GPIOA.DIR = uVar3 | 1 << config->pin; | |
} | |
else if (PVar1 == OUTPUT_OPEN_DRAIN) { | |
uVar3 = Peripherals::PORTCON.PORTA_IE; | |
Peripherals::PORTCON.PORTA_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PU; | |
Peripherals::PORTCON.PORTA_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_PD; | |
Peripherals::PORTCON.PORTA_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTA_OD; | |
Peripherals::PORTCON.PORTA_OD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::GPIOA.DIR; | |
Peripherals::GPIOA.DIR = uVar3 | 1 << config->pin; | |
} | |
if (config->edge == RISING) { | |
uVar3 = Peripherals::PORTCON.PORTA_WK_SEL; | |
Peripherals::PORTCON.PORTA_WK_SEL = uVar3 | 1 << config->pin; | |
} | |
else { | |
uVar3 = Peripherals::PORTCON.PORTA_WK_SEL; | |
Peripherals::PORTCON.PORTA_WK_SEL = uVar3 & ~(1 << config->pin); | |
} | |
if (config->wake == true) { | |
uVar3 = Peripherals::PORTCON.PORTA_WKE; | |
Peripherals::PORTCON.PORTA_WKE = uVar3 | 1 << config->pin; | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTA_WKE; | |
Peripherals::PORTCON.PORTA_WKE = uVar3 & ~(1 << config->pin); | |
} | |
else { | |
if (port == (GPIOA *)&Peripherals::GPIOB) { | |
uVar3 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar3 | 2; | |
uVar3 = (uint)config->pin; | |
if (uVar3 < 8) { | |
uVar2 = Peripherals::PORTCON.PORTB_SEL0; | |
Peripherals::PORTCON.PORTB_SEL0 = uVar2 & ~(0xf << ((uVar3 & 0x3f) << 2)); | |
} | |
else if (uVar3 < 0x10) { | |
uVar2 = Peripherals::PORTCON.PORTB_SEL1; | |
Peripherals::PORTCON.PORTB_SEL1 = uVar2 & ~(0xf << ((uVar3 - 8) * 4 & 0xff)); | |
} | |
PVar1 = config->mode; | |
if (PVar1 == INPUT_FLOATING) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTB_PU; | |
Peripherals::PORTCON.PORTB_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PD; | |
Peripherals::PORTCON.PORTB_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_OD; | |
Peripherals::PORTCON.PORTB_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOB.DIR; | |
Peripherals::GPIOB.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_UP) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTB_PU; | |
Peripherals::PORTCON.PORTB_PU = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTB_PD; | |
Peripherals::PORTCON.PORTB_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_OD; | |
Peripherals::PORTCON.PORTB_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOB.DIR; | |
Peripherals::GPIOB.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_DOWN) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTB_PU; | |
Peripherals::PORTCON.PORTB_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PD; | |
Peripherals::PORTCON.PORTB_PD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTB_OD; | |
Peripherals::PORTCON.PORTB_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOB.DIR; | |
Peripherals::GPIOB.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == OUTPUT_PUSH_PULL) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PU; | |
Peripherals::PORTCON.PORTB_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PD; | |
Peripherals::PORTCON.PORTB_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_OD; | |
Peripherals::PORTCON.PORTB_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOB.DIR; | |
Peripherals::GPIOB.DIR = uVar3 | 1 << config->pin; | |
} | |
else if (PVar1 == OUTPUT_OPEN_DRAIN) { | |
uVar3 = Peripherals::PORTCON.PORTB_IE; | |
Peripherals::PORTCON.PORTB_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PU; | |
Peripherals::PORTCON.PORTB_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_PD; | |
Peripherals::PORTCON.PORTB_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTB_OD; | |
Peripherals::PORTCON.PORTB_OD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::GPIOB.DIR; | |
Peripherals::GPIOB.DIR = uVar3 | 1 << config->pin; | |
} | |
if (config->edge == RISING) { | |
uVar3 = Peripherals::PORTCON.PORTB_WK_SEL; | |
Peripherals::PORTCON.PORTB_WK_SEL = uVar3 | 1 << config->pin; | |
} | |
else { | |
uVar3 = Peripherals::PORTCON.PORTB_WK_SEL; | |
Peripherals::PORTCON.PORTB_WK_SEL = uVar3 & ~(1 << config->pin); | |
} | |
if (config->wake == true) { | |
uVar3 = Peripherals::PORTCON.PORTB_WKE; | |
Peripherals::PORTCON.PORTB_WKE = uVar3 | 1 << config->pin; | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTB_WKE; | |
Peripherals::PORTCON.PORTB_WKE = uVar3 & ~(1 << config->pin); | |
return; | |
} | |
if (port == (GPIOA *)&Peripherals::GPIOC) { | |
uVar3 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar3 | 4; | |
if (config->pin < 8) { | |
uVar3 = Peripherals::PORTCON.PORTC_SEL0; | |
Peripherals::PORTCON.PORTC_SEL0 = uVar3 & ~(0xf << ((config->pin & 0x3f) << 2)); | |
} | |
PVar1 = config->mode; | |
if (PVar1 == INPUT_FLOATING) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTC_PU; | |
Peripherals::PORTCON.PORTC_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PD; | |
Peripherals::PORTCON.PORTC_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_OD; | |
Peripherals::PORTCON.PORTC_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOC.DIR; | |
Peripherals::GPIOC.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_UP) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTC_PU; | |
Peripherals::PORTCON.PORTC_PU = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTC_PD; | |
Peripherals::PORTCON.PORTC_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_OD; | |
Peripherals::PORTCON.PORTC_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOC.DIR; | |
Peripherals::GPIOC.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == INPUT_PULL_DOWN) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTC_PU; | |
Peripherals::PORTCON.PORTC_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PD; | |
Peripherals::PORTCON.PORTC_PD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::PORTCON.PORTC_OD; | |
Peripherals::PORTCON.PORTC_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOC.DIR; | |
Peripherals::GPIOC.DIR = uVar3 & ~(1 << config->pin); | |
} | |
else if (PVar1 == OUTPUT_PUSH_PULL) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PU; | |
Peripherals::PORTCON.PORTC_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PD; | |
Peripherals::PORTCON.PORTC_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_OD; | |
Peripherals::PORTCON.PORTC_OD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::GPIOC.DIR; | |
Peripherals::GPIOC.DIR = uVar3 | 1 << config->pin; | |
} | |
else if (PVar1 == OUTPUT_OPEN_DRAIN) { | |
uVar3 = Peripherals::PORTCON.PORTC_IE; | |
Peripherals::PORTCON.PORTC_IE = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PU; | |
Peripherals::PORTCON.PORTC_PU = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_PD; | |
Peripherals::PORTCON.PORTC_PD = uVar3 & ~(1 << config->pin); | |
uVar3 = Peripherals::PORTCON.PORTC_OD; | |
Peripherals::PORTCON.PORTC_OD = uVar3 | 1 << config->pin; | |
uVar3 = Peripherals::GPIOC.DIR; | |
Peripherals::GPIOC.DIR = uVar3 | 1 << config->pin; | |
} | |
if (config->edge == RISING) { | |
uVar3 = Peripherals::PORTCON.PORTC_WK_SEL; | |
Peripherals::PORTCON.PORTC_WK_SEL = uVar3 | 1 << config->pin; | |
} | |
else { | |
uVar3 = Peripherals::PORTCON.PORTC_WK_SEL; | |
Peripherals::PORTCON.PORTC_WK_SEL = uVar3 & ~(1 << config->pin); | |
} | |
if (config->wake == true) { | |
uVar3 = Peripherals::PORTCON.PORTC_WKE; | |
Peripherals::PORTCON.PORTC_WKE = uVar3 | 1 << config->pin; | |
return; | |
} | |
uVar3 = Peripherals::PORTCON.PORTC_WKE; | |
Peripherals::PORTCON.PORTC_WKE = uVar3 & ~(1 << config->pin); | |
return; | |
} | |
} | |
return; | |
} | |
void gpio_check_port(uint32_t *port) | |
{ | |
return; | |
} | |
void gpio_set_high(GPIOA *port,uint32_t pin) | |
{ | |
gpio_check_port(&port->DATA); | |
port->DATA = port->DATA | 1 << (pin & 0xff); | |
return; | |
} | |
void gpio_set_low(GPIOA *port,uint32_t pin) | |
{ | |
gpio_check_port(&port->DATA); | |
port->DATA = port->DATA & ~(1 << (pin & 0xff)); | |
return; | |
} | |
void gpio_toggle(GPIOA *port,uint32_t pin) | |
{ | |
gpio_check_port(&port->DATA); | |
port->DATA = port->DATA ^ 1 << (pin & 0xff); | |
return; | |
} | |
uint gpio_read(GPIOA *port,uint32_t pin) | |
{ | |
gpio_check_port(&port->DATA); | |
return port->DATA >> (pin & 0xff) & 1; | |
} | |
void timer_disable(TIMER_BASE0 *timer,TimerHalf half) | |
{ | |
if ((half & LOW) != 0) { | |
timer->EN = timer->EN & 0xfffffffe; | |
} | |
if ((int)(half << 0x1e) < 0) { | |
timer->EN = timer->EN & 0xfffffffd; | |
} | |
return; | |
} | |
// WARNING: Globals starting with '_' overlap smaller symbols at the same address | |
void timer_setup(TIMER_BASE0 *timer,TimerHalf half,TimerConfig *config) | |
{ | |
uint uVar1; | |
TIMER_BASE0 *pTVar2; | |
if (timer == &Peripherals::TIMER_BASE0) { | |
uVar1 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar1 | 0x1000; | |
} | |
else if (timer == (TIMER_BASE0 *)&Peripherals::TIMER_BASE1) { | |
uVar1 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar1 | 0x2000; | |
} | |
else if (timer == (TIMER_BASE0 *)&Peripherals::TIMER_BASE2) { | |
uVar1 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar1 | 0x4000; | |
} | |
pTVar2 = timer; | |
timer_disable(timer,half); | |
pTVar2->DIV = (uint)config->div; | |
if ((half & LOW) != 0) { | |
pTVar2->LOW_LOAD = (uint)config->load; | |
pTVar2->IE = pTVar2->IE & 0xfffffffe; | |
pTVar2->IE = pTVar2->IE | (uint)*(byte *)&config->ie; | |
} | |
if ((int)(half << 0x1e) < 0) { | |
pTVar2->HIGH_LOAD = (uint)config->load; | |
pTVar2->IE = pTVar2->IE & 0xfffffffd; | |
pTVar2->IE = pTVar2->IE | (uint)*(byte *)&config->ie << 1; | |
} | |
if (*(char *)&config->ie != '\0') { | |
if (timer == &Peripherals::TIMER_BASE0) { | |
_DAT_e000e100 = 0x20; | |
return; | |
} | |
if (timer == (TIMER_BASE0 *)&Peripherals::TIMER_BASE1) { | |
_DAT_e000e100 = 0x40; | |
return; | |
} | |
if (timer == (TIMER_BASE0 *)&Peripherals::TIMER_BASE2) { | |
_DAT_e000e100 = 0x200000; | |
} | |
} | |
return; | |
} | |
void timer_enable(TIMER_BASE0 *timer,TimerHalf half) | |
{ | |
if ((half & LOW) != 0) { | |
timer->EN = timer->EN | 1; | |
} | |
if ((int)(half << 0x1e) < 0) { | |
timer->EN = timer->EN | 2; | |
} | |
return; | |
} | |
void timer_set_div(TIMER_BASE0 *param_1,uint32_t param_2) | |
{ | |
param_1->DIV = param_2; | |
return; | |
} | |
void timer_set_load(TIMER_BASE0 *param_1,TimerHalf param_2,uint32_t param_3) | |
{ | |
if ((param_2 & LOW) != 0) { | |
param_1->LOW_LOAD = param_3; | |
} | |
if ((int)(param_2 << 0x1e) < 0) { | |
param_1->HIGH_LOAD = param_3; | |
} | |
return; | |
} | |
uint32_t timer_get_load(TIMER_BASE0 *param_1,TimerHalf param_2) | |
{ | |
if (param_2 == LOW) { | |
return param_1->LOW_LOAD & 0xffff; | |
} | |
if (param_2 != HIGH) { | |
return 0; | |
} | |
return param_1->HIGH_LOAD & 0xffff; | |
} | |
uint32_t FUN_00000a6c(TIMER_BASE0 *param_1,TimerHalf param_2) | |
{ | |
if (param_2 == LOW) { | |
return param_1->LOW_CNT & 0xffff; | |
} | |
if (param_2 != HIGH) { | |
return 0; | |
} | |
return param_1->HIGH_CNT & 0xffff; | |
} | |
void timer_set_ie(TIMER_BASE0 *param_1,TimerHalf param_2) | |
{ | |
if ((param_2 & LOW) != 0) { | |
param_1->IE = param_1->IE | 1; | |
} | |
if ((int)(param_2 << 0x1e) < 0) { | |
param_1->IE = param_1->IE | 2; | |
} | |
return; | |
} | |
void timer_clear_ie(TIMER_BASE0 *param_1,TimerHalf param_2) | |
{ | |
if ((param_2 & LOW) != 0) { | |
param_1->IE = param_1->IE & 0xfffffffe; | |
} | |
if ((int)(param_2 << 0x1e) < 0) { | |
param_1->IE = param_1->IE & 0xfffffffd; | |
} | |
return; | |
} | |
void timer_if_clear(TIMER_BASE0 *timer,TimerHalf half) | |
{ | |
if ((half & LOW) != 0) { | |
timer->IF = 1; | |
} | |
if ((int)(half << 0x1e) < 0) { | |
timer->IF = 2; | |
} | |
return; | |
} | |
uint32_t timer_if(TIMER_BASE0 *timer,TimerHalf half) | |
{ | |
if (half == LOW) { | |
if ((timer->IF & 1) != 0) { | |
return 1; | |
} | |
} | |
else if ((half == HIGH) && ((int)(timer->IF << 0x1e) < 0)) { | |
return 1; | |
} | |
return 0; | |
} | |
void setup_xtal_pins(void) | |
{ | |
PinAltConfig local_10; | |
local_10.port = PORTA; | |
local_10.pin = '\x01'; | |
local_10.alt = '\x01'; | |
local_10.ie = true; | |
setup_gpio_alt(&local_10); | |
local_10.port = PORTA; | |
local_10.pin = '\x02'; | |
local_10.alt = '\x01'; | |
local_10.ie = true; | |
setup_gpio_alt(&local_10); | |
return; | |
} | |
void setup_xtah_pins(void) | |
{ | |
PinAltConfig local_18; | |
local_18.port = PORTA; | |
local_18.pin = '\x03'; | |
local_18.alt = '\x02'; | |
local_18.ie = true; | |
setup_gpio_alt(&local_18); | |
local_18.port = PORTA; | |
local_18.pin = '\x04'; | |
local_18.alt = '\x02'; | |
local_18.ie = true; | |
setup_gpio_alt(&local_18); | |
return; | |
} | |
uint32_t syscon_clk_sel_unscramble(void) | |
{ | |
uint32_t clk_sel; | |
clk_sel = Peripherals::SYSCON.CLK_SEL; | |
return clk_sel & 0xfffff67f | clk_sel >> 4 & 0x80 | (clk_sel & 0x180) << 3; | |
} | |
void setup_rchf_48(void) | |
{ | |
uint32_t clk_sel; | |
uint32_t div_clk_gate; | |
uint32_t src_cfg; | |
// RCHF enable | |
src_cfg = Peripherals::PMU.SRC_CFG; | |
Peripherals::PMU.SRC_CFG = src_cfg & 0xfffffffd | 1; | |
// PLL use RCHF | |
clk_sel = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = clk_sel & 0xffffff8e; | |
// div clock gate off | |
div_clk_gate = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = div_clk_gate & 0xfffffffe; | |
return; | |
} | |
void setup_rchf_24(void) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
Peripherals::PMU.SRC_CFG = uVar1 | 3; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xffffff8e; | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 & 0xfffffffe; | |
return; | |
} | |
void setup_rchf_24_div2(void) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
setup_rchf_24(); | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xfffffff1 | 2; | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 | 1; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 | 1; | |
return; | |
} | |
void setup_xtah(void) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
uint uVar3; | |
uVar3 = 0; | |
setup_rchf_24(); | |
setup_xtah_pins(); | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
Peripherals::PMU.SRC_CFG = uVar1 | 4; | |
do { | |
uVar3 = uVar3 + 1; | |
} while (uVar3 < 1000000); | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xffffff81 | 0x20; | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 | 1; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 | 1; | |
return; | |
} | |
void setup_xtah_div2(void) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
uint uVar3; | |
uVar3 = 0; | |
setup_rchf_24(); | |
setup_xtah_pins(); | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
Peripherals::PMU.SRC_CFG = uVar1 | 4; | |
do { | |
uVar3 = uVar3 + 1; | |
} while (uVar3 < 1000000); | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xffffff81 | 0x22; | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 | 1; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 | 1; | |
return; | |
} | |
void setup_rchf_pll(int m,int n) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
setup_rchf_24(); | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xffffff01 | 0x40; | |
uVar1 = Peripherals::SYSCON.PLL_CTRL; | |
Peripherals::SYSCON.PLL_CTRL = n << 1 | m << 6 | uVar1 & 0xfffff801 | 1; | |
do { | |
uVar1 = Peripherals::SYSCON.PLL_ST; | |
} while ((uVar1 & 1) == 0); | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 | 1; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 | 1; | |
return; | |
} | |
void setup_rchf_pll_5_8(void) | |
{ | |
setup_rchf_pll(5,8); | |
return; | |
} | |
void setup_rchf_pll_5_7(void) | |
{ | |
setup_rchf_pll(5,7); | |
return; | |
} | |
void setup_xtah_pll(int m,int n) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
uint uVar3; | |
uVar3 = 0; | |
setup_rchf_24(); | |
setup_xtah_pins(); | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
Peripherals::PMU.SRC_CFG = uVar1 | 4; | |
do { | |
uVar3 = uVar3 + 1; | |
} while (uVar3 < 1000000); | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 & 0xffffff81 | 0xc0; | |
uVar1 = Peripherals::SYSCON.PLL_CTRL; | |
Peripherals::SYSCON.PLL_CTRL = n << 1 | m << 6 | uVar1 & 0xfffff801 | 1; | |
do { | |
uVar1 = Peripherals::SYSCON.PLL_ST; | |
} while ((uVar1 & 1) == 0); | |
uVar1 = Peripherals::SYSCON.DIV_CLK_GATE; | |
Peripherals::SYSCON.DIV_CLK_GATE = uVar1 | 1; | |
uVar2 = syscon_clk_sel_unscramble(); | |
Peripherals::SYSCON.CLK_SEL = uVar2 | 1; | |
return; | |
} | |
void setup_xtah_pll_1_8(void) | |
{ | |
setup_xtah_pll(1,8); | |
return; | |
} | |
void setup_xtah_pll_1_7(void) | |
{ | |
setup_xtah_pll(1,7); | |
return; | |
} | |
void setup_xtah_pll_1_6(void) | |
{ | |
setup_xtah_pll(1,6); | |
return; | |
} | |
void setup_xtah_pll_1_5(void) | |
{ | |
setup_xtah_pll(1,5); | |
return; | |
} | |
void setup_calculate_freqs(void) | |
{ | |
uint uVar1; | |
uint uVar2; | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
if ((uVar1 & 1) == 0) { | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
if ((int)(uVar1 << 0x1e) < 0) { | |
clock_freq = 24000000; | |
} | |
else { | |
clock_freq = 48000000; | |
} | |
} | |
else { | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
uVar2 = 1 << ((uVar1 << 0x1c) >> 0x1d) & 0xff; | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
if ((uVar1 << 0x19) >> 0x1d == 0) { | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
if ((int)(uVar1 << 0x1e) < 0) { | |
uVar2 = (uVar2 << 0x19) >> 0x18; | |
} | |
clock_freq = div32(48000000,uVar2); | |
} | |
else { | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
if ((uVar1 << 0x19) >> 0x1d == 2) { | |
clock_freq = div32(8000000,uVar2); | |
} | |
else { | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
if ((uVar1 << 0x19) >> 0x1d == 4) { | |
uVar1 = Peripherals::SYSCON.CLK_SEL; | |
if ((int)(uVar1 << 0x14) < 0) { | |
uVar1 = Peripherals::SYSCON.PLL_CTRL; | |
clock_freq = div32(8000000,((uVar1 << 0x15) >> 0x1b) + 1); | |
} | |
else { | |
uVar1 = Peripherals::PMU.SRC_CFG; | |
if ((int)(uVar1 << 0x1e) < 0) { | |
uVar2 = (uVar2 << 0x19) >> 0x18; | |
} | |
uVar1 = Peripherals::SYSCON.PLL_CTRL; | |
clock_freq = div32(48000000,((uVar1 << 0x15) >> 0x1b) + 1); | |
} | |
uVar1 = Peripherals::SYSCON.PLL_CTRL; | |
clock_freq = div32(clock_freq * (((uVar1 << 0x1a) >> 0x1b) + 1) * 2,uVar2); | |
} | |
} | |
} | |
} | |
clock_freq_mhz = div32(clock_freq,1000000); | |
return; | |
} | |
// WARNING: Function: __ARM_common_switch8 replaced with injection: switch8_r3 | |
// WARNING (jumptable): Removing unreachable block (ram,0x00000e24) | |
// WARNING: Removing unreachable block (ram,0x00000e24) | |
void setup_clock(ClockConfig param_1) | |
{ | |
switch(param_1) { | |
case RCHF_48: | |
setup_rchf_48(); | |
break; | |
case RCHF_24: | |
setup_rchf_24(); | |
return; | |
case RCHF_24_DIV2: | |
setup_rchf_24_div2(); | |
return; | |
case XTAH: | |
setup_xtah(); | |
return; | |
case XTAH_DIV2: | |
setup_xtah_div2(); | |
return; | |
case RCHF_PLL_5_8: | |
setup_rchf_pll_5_8(); | |
return; | |
case RCHF_PLL_5_7: | |
setup_rchf_pll_5_7(); | |
return; | |
case XTAH_PLL_1_8: | |
setup_xtah_pll_1_8(); | |
return; | |
case XTAH_PLL_1_7: | |
setup_xtah_pll_1_7(); | |
return; | |
case XTAH_PLL_1_6: | |
setup_xtah_pll_1_6(); | |
return; | |
case XTAH_PLL_1_5: | |
setup_xtah_pll_1_5(); | |
return; | |
} | |
return; | |
} | |
void setup_clocks_and_flash(void) | |
{ | |
setup_flash_trampoline(); | |
setup_clock(RCHF_PLL_5_8); | |
setup_calculate_freqs(); | |
return; | |
} | |
void setup_gpio(void) | |
{ | |
undefined4 in_r3; | |
PinConfig local_10; | |
local_10._2_2_ = (undefined2)((uint)in_r3 >> 0x10); | |
local_10.pin = 0; | |
local_10.mode = OUTPUT_PUSH_PULL; | |
gpio_configure_pin(&Peripherals::GPIOA,&local_10); | |
local_10.pin = 1; | |
local_10.mode = OUTPUT_PUSH_PULL; | |
gpio_configure_pin(&Peripherals::GPIOA,&local_10); | |
local_10.pin = 2; | |
local_10.mode = OUTPUT_PUSH_PULL; | |
gpio_configure_pin(&Peripherals::GPIOA,&local_10); | |
local_10.pin = '\x03'; | |
local_10.mode = OUTPUT_PUSH_PULL; | |
gpio_configure_pin(&Peripherals::GPIOA,&local_10); | |
gpio_set_high(&Peripherals::GPIOA,0); | |
gpio_set_high(&Peripherals::GPIOA,1); | |
gpio_set_low(&Peripherals::GPIOA,2); | |
gpio_set_low(&Peripherals::GPIOA,3); | |
return; | |
} | |
void setup_timer_base0(void) | |
{ | |
undefined4 in_r3; | |
TimerConfig local_10; | |
local_10.load = 999; | |
local_10.div = (short)clock_freq_mhz - 1; | |
stack0xfffffff4 = CONCAT31((int3)((uint)in_r3 >> 8),1); | |
timer_setup(&Peripherals::TIMER_BASE0,LOW,&local_10); | |
timer_enable(&Peripherals::TIMER_BASE0,LOW); | |
return; | |
} | |
void TIMER_BASE0(void) | |
{ | |
uint32_t uVar1; | |
uVar1 = timer_if(&Peripherals::TIMER_BASE0,LOW); | |
if (uVar1 != 0) { | |
timer_if_clear(&Peripherals::TIMER_BASE0,LOW); | |
count_fast = count_fast + 1; | |
} | |
return; | |
} | |
int div32(uint param_1,uint param_2) | |
{ | |
int iVar1; | |
uint uVar2; | |
uint uVar3; | |
iVar1 = 0; | |
uVar2 = 0x20; | |
while (uVar3 = uVar2 - 1, 0 < (int)uVar2) { | |
uVar2 = uVar3; | |
if (param_2 <= param_1 >> (uVar3 & 0xff)) { | |
param_1 = param_1 - (param_2 << (uVar3 & 0xff)); | |
iVar1 = iVar1 + (1 << (uVar3 & 0xff)); | |
} | |
} | |
return iVar1; | |
} | |
void init_run_table(void) | |
{ | |
init_table_entry *entry; | |
init_table_entry *end; | |
for (entry = init_table_start; entry < (init_table_entry *)&unknown_func; entry = entry + 1) { | |
(*entry->hook)(entry->src,entry->dest,entry->len); | |
} | |
main_thunk(); | |
return; | |
} | |
void setup_flash_trampoline(void) | |
{ | |
setup_flash_and_read_nvar(); | |
return; | |
} | |
// WARNING: This is an inlined function | |
void __ARM_common_switch8(void) | |
{ | |
uint in_r3; | |
uint uVar1; | |
int in_lr; | |
uVar1 = (uint)*(byte *)(in_lr + -1); | |
if (in_r3 < *(byte *)(in_lr + -1)) { | |
uVar1 = in_r3; | |
} | |
// WARNING: Could not recover jumptable at 0x00001038. Too many branches | |
// WARNING: Treating indirect jump as call | |
(*(code *)(in_lr + (uint)*(byte *)(in_lr + uVar1) * 2))(); | |
return; | |
} | |
void init_hook_copy(uint32_t *src,uint32_t *dest,uint32_t len) | |
{ | |
uint32_t tmp; | |
for (; len != 0; len = len - 4) { | |
tmp = *src; | |
src = src + 1; | |
*dest = tmp; | |
dest = dest + 1; | |
} | |
return; | |
} | |
void init_hook_zero(uint32_t *src,uint32_t *dest,uint32_t len) | |
{ | |
for (; len != 0; len = len - 4) { | |
*dest = 0; | |
dest = dest + 1; | |
} | |
return; | |
} | |
bool flash_init_ready(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_STATUS; | |
if ((uVar1 & 1) != 0) { | |
return false; | |
} | |
return true; | |
} | |
bool flash_busy(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_STATUS; | |
if ((int)(uVar1 << 0x1e) < 0) { | |
return true; | |
} | |
return false; | |
} | |
bool flash_prog_buf_empty(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_STATUS; | |
if ((int)(uVar1 << 0x1d) < 0) { | |
return true; | |
} | |
return false; | |
} | |
void flash_enter_low_power(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = uVar1 | 0x80000000; | |
return; | |
} | |
void flash_leave_low_power_and_wait_init(void) | |
{ | |
uint uVar1; | |
bool ready; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = uVar1 & 0x7fffffff; | |
do { | |
ready = flash_init_ready(); | |
} while (!ready); | |
return; | |
} | |
void flash_set_read_mode(bool long_reads) | |
{ | |
uint uVar1; | |
if (long_reads) { | |
if (long_reads) { | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = uVar1 | 1; | |
} | |
return; | |
} | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = uVar1 & 0xfffffffe; | |
return; | |
} | |
void flash_set_nvar(int nvar_mode) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = nvar_mode << 1 | uVar1 & 0xfffffffd; | |
return; | |
} | |
void flash_set_mode(int mode) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_CFG; | |
Peripherals::FLASH_CTRL.FLASH_CFG = mode << 2 | uVar1 & 0xffffffe3; | |
return; | |
} | |
void flash_set_erasetime(void) | |
{ | |
Peripherals::FLASH_CTRL.FLASH_ERASETIME = clock_freq_mhz * 0x1a00e10; | |
return; | |
} | |
void flash_set_progtime(void) | |
{ | |
Peripherals::FLASH_CTRL.FLASH_PROGTIME = clock_freq_mhz * 0xb012; | |
return; | |
} | |
void flash_lock(void) | |
{ | |
Peripherals::FLASH_CTRL.FLASH_LOCK = 0x55; | |
return; | |
} | |
void flash_unlock(void) | |
{ | |
Peripherals::FLASH_CTRL.FLASH_UNLOCK = 0xaa; | |
return; | |
} | |
void setup_flash(bool long_reads) | |
{ | |
flash_leave_low_power_and_wait_init(); | |
flash_set_mode(0); | |
flash_set_read_mode(long_reads); | |
flash_set_erasetime(); | |
flash_set_progtime(); | |
flash_lock(); | |
return; | |
} | |
void flash_start(void) | |
{ | |
uint uVar1; | |
flash_unlock(); | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_START; | |
Peripherals::FLASH_CTRL.FLASH_START = uVar1 | 1; | |
return; | |
} | |
void flash_mask_lock(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_MASK; | |
Peripherals::FLASH_CTRL.FLASH_MASK = uVar1 | 4; | |
return; | |
} | |
void flash_mask_unlock(void) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_MASK; | |
Peripherals::FLASH_CTRL.FLASH_MASK = uVar1 & 0xfffffffb; | |
return; | |
} | |
void flash_set_mask(uint mask_sel) | |
{ | |
uint uVar1; | |
uVar1 = Peripherals::FLASH_CTRL.FLASH_MASK; | |
Peripherals::FLASH_CTRL.FLASH_MASK = uVar1 & 0xfffffffc | mask_sel; | |
return; | |
} | |
void flash_execute(void) | |
{ | |
bool busy; | |
flash_start(); | |
do { | |
busy = flash_busy(); | |
} while (busy); | |
flash_set_mode(0); | |
flash_lock(); | |
return; | |
} | |
void flash_erase(void *addr) | |
{ | |
bool busy; | |
do { | |
busy = flash_busy(); | |
} while (busy); | |
flash_set_mode(2); | |
Peripherals::FLASH_CTRL.FLASH_ADDR = (uint)addr >> 2; | |
flash_execute(); | |
return; | |
} | |
void flash_undocumented_mode_3(void) | |
{ | |
bool busy; | |
do { | |
busy = flash_busy(); | |
} while (busy); | |
flash_set_mode(3); | |
flash_execute(); | |
return; | |
} | |
void flash_program_word(uint32_t *dest,undefined *data) | |
{ | |
bool busy; | |
do { | |
busy = flash_busy(); | |
} while (busy); | |
flash_set_mode(1); | |
Peripherals::FLASH_CTRL.FLASH_ADDR = (uint)dest >> 2; | |
Peripherals::FLASH_CTRL.FLASH_WDATA = (uint)data; | |
flash_execute(); | |
return; | |
} | |
bool flash_program(uint32_t *dest,uint32_t *src,size_t len_in_words) | |
{ | |
bool busy; | |
bool prog_buf_empty; | |
bool busy2; | |
size_t i; | |
if ((len_in_words < 0x41) && (((uint)((int)dest << 0x18) >> 0x1a) + len_in_words < 0x41)) { | |
do { | |
busy = flash_busy(); | |
} while (busy); | |
flash_set_mode(1); | |
Peripherals::FLASH_CTRL.FLASH_ADDR = (uint)dest >> 2; | |
Peripherals::FLASH_CTRL.FLASH_WDATA = *src; | |
flash_start(); | |
for (i = 1; i < len_in_words; i = i + 1) { | |
do { | |
prog_buf_empty = flash_prog_buf_empty(); | |
} while (!prog_buf_empty); | |
Peripherals::FLASH_CTRL.FLASH_WDATA = src[i]; | |
} | |
do { | |
busy2 = flash_busy(); | |
} while (busy2); | |
flash_set_mode(0); | |
flash_lock(); | |
return false; | |
} | |
return true; | |
} | |
uint32_t aligned_read32(void *param_1) | |
{ | |
return *(uint32_t *)((uint)param_1 & 0xfffffffc); | |
} | |
void memcpy_word_realign(uint32_t *src,uint32_t *dest,size_t len_in_words) | |
{ | |
size_t i; | |
for (i = 0; i < len_in_words; i = i + 1) { | |
dest[i] = *(uint32_t *)(((uint)src & 0xfffffffc) + i * 4); | |
} | |
return; | |
} | |
void setup_flash_and_read_nvar(void) | |
{ | |
uint uVar1; | |
uint32_t uVar2; | |
int extraout_r1; | |
int extraout_r1_00; | |
int extraout_r1_01; | |
setup_flash(1); | |
flash_set_nvar(1); | |
// this is TRIM_POW0 through TRIM_POW3, ghidra is just confused | |
uVar2 = aligned_read32((void *)0x7e4); | |
Peripherals::PMU.TRIM_POW0 = uVar2; | |
uVar2 = aligned_read32((void *)0x7e0); | |
*(uint32_t *)(extraout_r1 + 0x24) = uVar2; | |
uVar2 = aligned_read32((void *)0x7d8); | |
*(uint32_t *)(extraout_r1_00 + 0x30) = uVar2; | |
uVar2 = aligned_read32((void *)0x7d4); | |
*(uint32_t *)(extraout_r1_01 + 0x34) = uVar2; | |
// ok back to other registers | |
uVar2 = aligned_read32((void *)0x7bc); | |
uVar1 = Peripherals::SYSCON.DEV_CLK_GATE; | |
Peripherals::SYSCON.DEV_CLK_GATE = uVar1 | 0x2000000; | |
Peripherals::SARADC.ADC_CALIB_OFFSET = uVar2 & 0xff; | |
Peripherals::SARADC.ADC_CALIB_KD = (uVar2 << 6) >> 0x16; | |
flash_set_nvar(0); | |
return; | |
} | |
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