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KunYi/lattepanda_mu_booting.log

Created July 29, 2024 13:43
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coreboot on LattePanda Mu booting log
Raw
lattepanda_mu_booting.log
[NOTE ] coreboot-96a61745ea29-dirty Mon Jul 29 10:28:36 UTC 2024 x86_32 bootblock starting (log level: 7)...
[DEBUG] CPU: Intel(R) N100
[DEBUG] CPU: ID b06e0, Alderlake-N Platform, ucode: 00000015
[DEBUG] CPU: AES supported, TXT NOT supported, VT supported
[INFO ] Cache: Level 3: Associativity = 12 Partitions = 1 Line Size = 64 Sets = 8192
[INFO ] Cache size = 6 MiB
[DEBUG] MCH: device id 461c (rev 00) is Alderlake-N
[DEBUG] PCH: device id 5481 (rev 00) is Alderlake-N SKU
[DEBUG] IGD: device id 46d1 (rev 00) is Alderlake N GT2
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x610000.
[DEBUG] FMAP: base = 0xff000000 size = 0x1000000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 610200 (10419712 bytes)
[INFO ] CBFS: mcache @0xfef84600 built for 19 files, used 0x3ec of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x11f20 in mcache @0xfef8462c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 98 ms
[NOTE ] coreboot-96a61745ea29-dirty Mon Jul 29 10:28:36 UTC 2024 x86_32 romstage starting (log level: 7)...
[DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
[DEBUG] TCO_STS: 0000 0000
[DEBUG] GEN_PMCON: d8a41a38 00002200
[DEBUG] GBLRST_CAUSE: 00000040 00000000
[DEBUG] HPR_CAUSE0: 00000004
[DEBUG] prev_sleep_state 0 (S0)
[INFO ] OC Watchdog: disabling watchdog timer
[DEBUG] Abort disabling TXT, as CPU is not TXT capable.
[DEBUG] FMAP: area COREBOOT found @ 610200 (10419712 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'fspm.bin' @0x59dc0 size 0xc0000 in mcache @0xfef84850
[DEBUG] FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
[INFO ] SPD index is 0x0
[DEBUG] SPD index = 0
[INFO ] CBFS: Found 'spd.bin' @0x54400 size 0x1000 in mcache @0xfef847d8
[INFO ] SPD: module type is LPDDR5
[INFO ] SPD: module part number is
[INFO ] SPD: banks 8, ranks 1, rows 16, columns 11, density 16384 Mb
[INFO ] SPD: device width 16 bits, bus width 16 bits
[INFO ] SPD: module size is 2048 MB (per channel)
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x76fff000 254 entries.
[DEBUG] IMD: root @ 0x76ffec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7bbff000 254 entries.
[DEBUG] IMD: root @ 0x7bbfec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] 4 DIMMs found
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7b800000 0x800000
[DEBUG] Subregion 0: 0x7b800000 0x200000
[DEBUG] Subregion 1: 0x7ba00000 0x200000
[DEBUG] Subregion 2: 0x7bc00000 0x400000
[DEBUG] top_of_ram = 0x77000000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x15ea40 size 0x6034 in mcache @0xfef848c4
[DEBUG] Loading module at 0x76bfe000 with entry 0x76bfe031. filesize: 0x5c48 memsize: 0xc000
[DEBUG] Processing 235 relocs. Offset value of 0x74bfe000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 261 ms
[NOTE ] coreboot-96a61745ea29-dirty Mon Jul 29 10:28:36 UTC 2024 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ 610200 (10419712 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'fallback/ramstage' @0x33d00 size 0x1f179 in mcache @0x76c0d10c
[DEBUG] Loading module at 0x76aa2000 with entry 0x76aa2000. filesize: 0x41380 memsize: 0x15a050
[DEBUG] Processing 5054 relocs. Offset value of 0x72aa2000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 56 ms
[NOTE ] coreboot-96a61745ea29-dirty Mon Jul 29 10:28:36 UTC 2024 x86_32 ramstage starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] microcode: sig=0xb06e0 pf=0x1 revision=0x15
[DEBUG] FMAP: area COREBOOT found @ 610200 (10419712 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x12040 size 0x21c00 in mcache @0x76c0d0ac
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CBFS: Found 'fsps.bin' @0x119e00 size 0x44bf7 in mcache @0x76c0d290
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Setting up SMI for CPU
[DEBUG] IED base = 0x7bc00000
[DEBUG] IED size = 0x00400000
[INFO ] Will perform SMM setup.
[INFO ] CPU: Intel(R) N100.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x6 in XAPIC mode.
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] LAPIC 0x4 in XAPIC mode.
[INFO ] AP: slot 2 apic_id 6, MCU rev: 0x00000015
[INFO ] AP: slot 3 apic_id 2, MCU rev: 0x00000015
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 4, MCU rev: 0x00000015
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1c0 memsize: 0x1c0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x76ac0609
[DEBUG] Installing permanent SMM handler to 0x7b800000
[DEBUG] HANDLER [0x7b9ff000-0x7b9fff60]
[DEBUG] CPU 0
[DEBUG] ss0 [0x7b9fec00-0x7b9ff000]
[DEBUG] stub0 [0x7b9f7000-0x7b9f71c0]
[DEBUG] CPU 1
[DEBUG] ss1 [0x7b9fe800-0x7b9fec00]
[DEBUG] stub1 [0x7b9f6c00-0x7b9f6dc0]
[DEBUG] CPU 2
[DEBUG] ss2 [0x7b9fe400-0x7b9fe800]
[DEBUG] stub2 [0x7b9f6800-0x7b9f69c0]
[DEBUG] CPU 3
[DEBUG] ss3 [0x7b9fe000-0x7b9fe400]
[DEBUG] stub3 [0x7b9f6400-0x7b9f65c0]
[DEBUG] stacks [0x7b800000-0x7b802000]
[DEBUG] Loading module at 0x7b9ff000 with entry 0x7b9ff071. filesize: 0xf50 memsize: 0xf60
[DEBUG] Processing 91 relocs. Offset value of 0x7b9ff000
[DEBUG] Loading module at 0x7b9f7000 with entry 0x7b9f7000. filesize: 0x1c0 memsize: 0x1c0
[DEBUG] Processing 9 relocs. Offset value of 0x7b9f7000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000
[DEBUG] SMM Module: placing smm entry code at 7b9f6c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7b9f6800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7b9f6400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7b9f7000. Will call 0x7b9ff071
[DEBUG] Clearing SMI status registers
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ef000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7b9ef000 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ee400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7b9ee400 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ee800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7b9ee800 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eec00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7b9eec00 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 7
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #3
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #2
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] cpu: energy policy set to 7
[DEBUG] cpu: energy policy set to 7
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #1 initialized
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #2 initialized
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 7
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #3 initialized
[INFO ] bsp_do_flight_plan done after 454 msecs.
[DEBUG] CPU: frequency set to 3400 MHz
[DEBUG] Enabling SMIs.
[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 290 / 410 ms
[INFO ] Overriding power limits PL1 (3000, 6000) PL2 (25000, 25000) PL4 (78000)
[DEBUG] All HSPHY ports disabled, skipping HSPHY loading
[INFO ] PCI 1.0, PIN A, using IRQ #16
[INFO ] PCI 2.0, PIN A, using IRQ #17
[INFO ] PCI 4.0, PIN A, using IRQ #18
[INFO ] PCI 5.0, PIN A, using IRQ #16
[INFO ] PCI 6.0, PIN A, using IRQ #16
[INFO ] PCI 6.2, PIN C, using IRQ #18
[INFO ] PCI 7.0, PIN A, using IRQ #19
[INFO ] PCI 7.1, PIN B, using IRQ #20
[INFO ] PCI 7.2, PIN C, using IRQ #21
[INFO ] PCI 7.3, PIN D, using IRQ #22
[INFO ] PCI 8.0, PIN A, using IRQ #23
[INFO ] PCI D.0, PIN A, using IRQ #17
[INFO ] PCI D.1, PIN B, using IRQ #19
[INFO ] PCI 10.0, PIN A, using IRQ #24
[INFO ] PCI 10.1, PIN B, using IRQ #25
[INFO ] PCI 10.6, PIN C, using IRQ #20
[INFO ] PCI 10.7, PIN D, using IRQ #21
[INFO ] PCI 11.0, PIN A, using IRQ #26
[INFO ] PCI 11.1, PIN B, using IRQ #27
[INFO ] PCI 11.2, PIN C, using IRQ #28
[INFO ] PCI 11.3, PIN D, using IRQ #29
[INFO ] PCI 12.0, PIN A, using IRQ #30
[INFO ] PCI 12.6, PIN B, using IRQ #31
[INFO ] PCI 12.7, PIN C, using IRQ #22
[INFO ] PCI 13.0, PIN A, using IRQ #32
[INFO ] PCI 13.1, PIN B, using IRQ #33
[INFO ] PCI 13.2, PIN C, using IRQ #34
[INFO ] PCI 13.3, PIN D, using IRQ #35
[INFO ] PCI 14.0, PIN B, using IRQ #23
[INFO ] PCI 14.1, PIN A, using IRQ #36
[INFO ] PCI 14.3, PIN C, using IRQ #17
[INFO ] PCI 15.0, PIN A, using IRQ #37
[INFO ] PCI 15.1, PIN B, using IRQ #38
[INFO ] PCI 15.2, PIN C, using IRQ #39
[INFO ] PCI 15.3, PIN D, using IRQ #40
[INFO ] PCI 16.0, PIN A, using IRQ #18
[INFO ] PCI 16.1, PIN B, using IRQ #19
[INFO ] PCI 16.2, PIN C, using IRQ #20
[INFO ] PCI 16.3, PIN D, using IRQ #21
[INFO ] PCI 16.4, PIN A, using IRQ #18
[INFO ] PCI 16.5, PIN B, using IRQ #19
[INFO ] PCI 17.0, PIN A, using IRQ #22
[INFO ] PCI 19.0, PIN A, using IRQ #41
[INFO ] PCI 19.1, PIN B, using IRQ #42
[INFO ] PCI 19.2, PIN C, using IRQ #43
[INFO ] PCI 1A.0, PIN A, using IRQ #23
[INFO ] PCI 1C.0, PIN A, using IRQ #16
[INFO ] PCI 1C.1, PIN B, using IRQ #17
[INFO ] PCI 1C.2, PIN C, using IRQ #18
[INFO ] PCI 1C.3, PIN D, using IRQ #19
[INFO ] PCI 1C.4, PIN A, using IRQ #16
[INFO ] PCI 1C.5, PIN B, using IRQ #17
[INFO ] PCI 1C.6, PIN C, using IRQ #18
[INFO ] PCI 1C.7, PIN D, using IRQ #19
[INFO ] PCI 1D.0, PIN A, using IRQ #16
[INFO ] PCI 1D.1, PIN B, using IRQ #17
[INFO ] PCI 1D.2, PIN C, using IRQ #18
[INFO ] PCI 1D.3, PIN D, using IRQ #19
[INFO ] PCI 1E.0, PIN A, using IRQ #20
[INFO ] PCI 1E.1, PIN B, using IRQ #21
[INFO ] PCI 1E.2, PIN C, using IRQ #44
[INFO ] PCI 1E.3, PIN D, using IRQ #45
[INFO ] PCI 1F.3, PIN B, using IRQ #23
[INFO ] PCI 1F.4, PIN C, using IRQ #20
[INFO ] PCI 1F.6, PIN D, using IRQ #21
[INFO ] PCI 1F.7, PIN A, using IRQ #22
[INFO ] IRQ: Using dynamically assigned PCI IO-APIC IRQs
[DEBUG] WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
[INFO ] FSPS, status=0x00000000
[DEBUG] FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_silicon_multi_phase_init_cb called
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Display FSP Version Info HOB
[DEBUG] Reference Code - CPU = c.e0.89.40
[DEBUG] uCode Version = 0.0.0.15
[DEBUG] TXT ACM version = ff.ff.ff.ffff
[DEBUG] Reference Code - ME = c.e0.89.40
[DEBUG] MEBx version = 0.0.0.0
[DEBUG] ME Firmware Version = Consumer SKU
[DEBUG] Reference Code - PCH = c.e0.89.40
[DEBUG] PCH-CRID Status = Disabled
[DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff
[DEBUG] PCH-CRID New Value = ff.ff.ff.ffff
[DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff
[DEBUG] PCH Hsio Version = 4.0.0.0
[DEBUG] Reference Code - SA - System Agent = c.e0.89.40
[DEBUG] Reference Code - MRC = 0.0.4.4a
[DEBUG] SA - PCIe Version = c.e0.89.40
[DEBUG] SA-CRID Status = Disabled
[DEBUG] SA-CRID Original Value = 0.0.0.0
[DEBUG] SA-CRID New Value = 0.0.0.0
[DEBUG] OPROM - VBIOS = ff.ff.ff.ffff
[DEBUG] IO Manageability Engine FW Version = 23.0.8.0
[DEBUG] PHY Build Version = 0.0.0.fa5
[DEBUG] Thunderbolt(TM) FW Version = 0.0.0.0
[DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff
[INFO ] Found PCIe Root Port #7 at PCI: 00:1c.0.
[INFO ] Remapping PCIe Root Port #7 from PCI: 00:00:1c.6 to new function number 0.
[NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:00:1d.0) which was enabled in devicetree, removing and disabling.
[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 164 / 639 ms
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[DEBUG] PCI: 00:00:00.0 [8086/461c] enabled
[DEBUG] PCI: 00:00:02.0 [8086/46d1] enabled
[DEBUG] PCI: 00:00:04.0 [8086/461d] enabled
[DEBUG] PCI: 00:00:0d.0 [8086/464e] enabled
[INFO ] PCI: Static device PCI: 00:00:12.0 not found, disabling it.
[INFO ] PCI: Static device PCI: 00:00:12.7 not found, disabling it.
[DEBUG] PCI: 00:00:14.0 [8086/54ed] enabled
[DEBUG] PCI: 00:00:14.2 [8086/54ef] disabled
[INFO ] PCI: Static device PCI: 00:00:14.3 not found, disabling it.
[DEBUG] PCI: 00:00:15.0 [8086/54e8] enabled
[DEBUG] PCI: 00:00:15.1 [8086/54e9] enabled
[DEBUG] PCI: 00:00:15.2 [8086/54ea] enabled
[DEBUG] PCI: 00:00:15.3 [8086/54eb] enabled
[DEBUG] PCI: 00:00:16.0 [8086/54e0] enabled
[DEBUG] PCI: 00:00:19.0 [8086/54c5] disabled
[DEBUG] PCI: 00:00:19.1 [8086/54c6] disabled
[DEBUG] PCI: 00:00:1a.0 [8086/54c4] enabled
[DEBUG] PCI: 00:00:1c.0 [8086/54be] enabled
[DEBUG] PCI: 00:00:1e.0 [8086/54a8] enabled
[DEBUG] PCI: 00:00:1e.2 [8086/54aa] enabled
[DEBUG] PCI: 00:00:1f.0 [8086/5481] enabled
[INFO ] PCI: Static device PCI: 00:00:1f.1 not found, disabling it.
[DEBUG] RTC Init
[INFO ] Set power on after power failure.
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S5
[DEBUG] Disabling Deep S5
[DEBUG] PCI: 00:00:1f.2 [0000/0000] hidden
[DEBUG] PCI: 00:00:1f.3 [8086/54c8] enabled
[DEBUG] PCI: 00:00:1f.4 [8086/54a3] enabled
[DEBUG] PCI: 00:00:1f.5 [8086/54a4] enabled
[DEBUG] GPIO: 0 enabled
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:00:01.0
[WARN ] PCI: 00:00:01.1
[WARN ] PCI: 00:00:05.0
[WARN ] PCI: 00:00:06.0
[WARN ] PCI: 00:00:06.2
[WARN ] PCI: 00:00:07.0
[WARN ] PCI: 00:00:07.1
[WARN ] PCI: 00:00:07.2
[WARN ] PCI: 00:00:07.3
[WARN ] PCI: 00:00:08.0
[WARN ] PCI: 00:00:09.0
[WARN ] PCI: 00:00:0a.0
[WARN ] PCI: 00:00:0d.1
[WARN ] PCI: 00:00:0d.2
[WARN ] PCI: 00:00:0d.3
[WARN ] PCI: 00:00:0e.0
[WARN ] PCI: 00:00:10.0
[WARN ] PCI: 00:00:10.1
[WARN ] PCI: 00:00:10.6
[WARN ] PCI: 00:00:10.7
[WARN ] PCI: 00:00:12.0
[WARN ] PCI: 00:00:12.6
[WARN ] PCI: 00:00:12.7
[WARN ] PCI: 00:00:13.0
[WARN ] PCI: 00:00:14.1
[WARN ] PCI: 00:00:14.3
[WARN ] PCI: 00:00:16.1
[WARN ] PCI: 00:00:16.2
[WARN ] PCI: 00:00:16.3
[WARN ] PCI: 00:00:16.4
[WARN ] PCI: 00:00:16.5
[WARN ] PCI: 00:00:17.0
[WARN ] PCI: 00:00:19.2
[WARN ] PCI: 00:00:1e.1
[WARN ] PCI: 00:00:1e.3
[WARN ] PCI: 00:00:1f.1
[WARN ] PCI: 00:00:1f.6
[WARN ] PCI: 00:00:1f.7
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:00:02.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs
[DEBUG] PCI: 00:00:04.0 scanning...
[DEBUG] GENERIC: 0.0 enabled
[DEBUG] bus: PCI: 00:00:04.0->scan_bus: bus PCI: 00:00:04.0 finished in 7 msecs
[DEBUG] PCI: 00:00:0d.0 scanning...
[DEBUG] USB0 port 0 disabled
[DEBUG] scan_bus: bus PCI: 00:00:0d.0 finished in 3 msecs
[DEBUG] PCI: 00:00:14.0 scanning...
[DEBUG] USB0 port 0 disabled
[DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 3 msecs
[DEBUG] PCI: 00:00:15.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:15.0 finished in 0 msecs
[DEBUG] PCI: 00:00:15.1 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:15.1 finished in 0 msecs
[DEBUG] PCI: 00:00:15.2 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:15.2 finished in 0 msecs
[DEBUG] PCI: 00:00:15.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:15.3 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.0 scanning...
[INFO ] PCI: 00:00:1c.0: Enabled LTR
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 21 msecs
[DEBUG] PCI: 00:00:1e.2 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1e.2 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.0 scanning...
[DEBUG] PNP: 002e.0 disabled
[DEBUG] PNP: 002e.1 enabled
[DEBUG] PNP: 002e.4 disabled
[DEBUG] PNP: 002e.5 disabled
[DEBUG] PNP: 002e.6 disabled
[DEBUG] PNP: 002e.7 disabled
[DEBUG] PNP: 002e.a disabled
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 28 msecs
[DEBUG] PCI: 00:00:1f.2 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.4 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 562 msecs
[DEBUG] scan_bus: bus Root Device finished in 582 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 5 / 595 ms
[INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
[DEBUG] FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
[INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000
[DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000
[DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000
[DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000
[DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
[DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000
[DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000
[DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000
[DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000
[DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000
[DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
[DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000
[DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000
[DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000
[DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000
[DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000
[DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
[DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
[DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000
[DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000
[DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000
[INFO ] Available memory above 4GB: 6140M
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000200 limit 000002ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 00000a00 limit 00000a3f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 8c base 000003f0 limit 000003ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 90 base 00000080 limit 0000008f io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 000003f8 limit 000003ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 01 base 00001800 limit 000018ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 800, Tag: 100
[INFO ] * Base: 1900, Size: d6a0, Tag: 100
[INFO ] * Base: efc0, Size: 1040, Tag: 100
[DEBUG] PCI: 00:00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base fedc0000 limit feddffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base feda0000 limit feda0fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base feda1000 limit feda1fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fb000000 limit fb000fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base fec00000 limit fecfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed92000 limit fed92fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base fed85000 limit fed85fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0e base fed86000 limit fed86fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0f base fed87000 limit fed87fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 10 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 11 base c0000000 limit cfffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 17 base 77000000 limit 803fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 00 base ff000000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200
[INFO ] * Base: d0000000, Size: 10000000, Tag: 200
[INFO ] * Base: 27fc00000, Size: 7d80400000, Tag: 200
[DEBUG] PCI: 00:00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
[DEBUG] PCI: 00:00:02.0 10 * [0xbf000000 - 0xbfffffff] limit: bfffffff mem
[DEBUG] PCI: 00:00:1f.3 20 * [0xbef00000 - 0xbeffffff] limit: beffffff mem
[DEBUG] PCI: 00:00:04.0 10 * [0xbeee0000 - 0xbeefffff] limit: beefffff mem
[DEBUG] PCI: 00:00:0d.0 10 * [0xbeed0000 - 0xbeedffff] limit: beedffff mem
[DEBUG] PCI: 00:00:14.0 10 * [0xbeec0000 - 0xbeecffff] limit: beecffff mem
[DEBUG] PCI: 00:00:1f.3 10 * [0xbeebc000 - 0xbeebffff] limit: beebffff mem
[DEBUG] PCI: 00:00:15.0 10 * [0xbeebb000 - 0xbeebbfff] limit: beebbfff mem
[DEBUG] PCI: 00:00:15.1 10 * [0xbeeba000 - 0xbeebafff] limit: beebafff mem
[DEBUG] PCI: 00:00:15.2 10 * [0xbeeb9000 - 0xbeeb9fff] limit: beeb9fff mem
[DEBUG] PCI: 00:00:15.3 10 * [0xbeeb8000 - 0xbeeb8fff] limit: beeb8fff mem
[DEBUG] PCI: 00:00:16.0 10 * [0xbeeb7000 - 0xbeeb7fff] limit: beeb7fff mem
[DEBUG] PCI: 00:00:1a.0 10 * [0xbeeb6000 - 0xbeeb6fff] limit: beeb6fff mem
[DEBUG] PCI: 00:00:1e.0 10 * [0xbeeb5000 - 0xbeeb5fff] limit: beeb5fff mem
[DEBUG] PCI: 00:00:1e.0 18 * [0xbeeb4000 - 0xbeeb4fff] limit: beeb4fff mem
[DEBUG] PCI: 00:00:1e.2 10 * [0xbeeb3000 - 0xbeeb3fff] limit: beeb3fff mem
[DEBUG] PCI: 00:00:1f.5 10 * [0xbeeb2000 - 0xbeeb2fff] limit: beeb2fff mem
[DEBUG] PCI: 00:00:1f.4 10 * [0xbeeb1000 - 0xbeeb10ff] limit: beeb10ff mem
[DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000bf000000 - 0x00000000bfffffff] size 0x01000000 gran 0x18 mem64
[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:00:04.0 10 <- [0x00000000beee0000 - 0x00000000beefffff] size 0x00020000 gran 0x11 mem64
[DEBUG] PCI: 00:00:0d.0 10 <- [0x00000000beed0000 - 0x00000000beedffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:00:14.0 10 <- [0x00000000beec0000 - 0x00000000beecffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:00:15.0 10 <- [0x00000000beebb000 - 0x00000000beebbfff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:15.1 10 <- [0x00000000beeba000 - 0x00000000beebafff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:15.2 10 <- [0x00000000beeb9000 - 0x00000000beeb9fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:15.3 10 <- [0x00000000beeb8000 - 0x00000000beeb8fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000beeb7000 - 0x00000000beeb7fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000beeb6000 - 0x00000000beeb6fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
[DEBUG] PCI: 00:00:1e.0 10 <- [0x00000000beeb5000 - 0x00000000beeb5fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1e.0 18 <- [0x00000000beeb4000 - 0x00000000beeb4fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1e.2 10 <- [0x00000000beeb3000 - 0x00000000beeb3fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PNP: 002e.1 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.1 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
[NOTE ] PNP: 002e.1 f0 irq size: 0x0000000001 not assigned in devicetree
[DEBUG] LPC: enabling default decode range LPC_IOE_COMA_EN
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000beebc000 - 0x00000000beebffff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1f.3 20 <- [0x00000000bef00000 - 0x00000000beffffff] size 0x00100000 gran 0x14 mem64
[DEBUG] PCI: 00:00:1f.4 10 <- [0x00000000beeb1000 - 0x00000000beeb10ff] size 0x00000100 gran 0x08 mem64
[DEBUG] PCI: 00:00:1f.5 10 <- [0x00000000beeb2000 - 0x00000000beeb2fff] size 0x00001000 gran 0x0c mem
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 1218 ms
[INFO ] coreboot skipped calling FSP notify phase: 00000020.
[DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 7 ms
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 subsystem <- 8086/461c
[DEBUG] PCI: 00:00:00.0 cmd <- 06
[DEBUG] PCI: 00:00:02.0 subsystem <- 8086/46d1
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:04.0 subsystem <- 8086/461d
[DEBUG] PCI: 00:00:04.0 cmd <- 02
[DEBUG] PCI: 00:00:0d.0 subsystem <- 8086/464e
[DEBUG] PCI: 00:00:0d.0 cmd <- 02
[DEBUG] PCI: 00:00:14.0 subsystem <- 8086/54ed
[DEBUG] PCI: 00:00:14.0 cmd <- 02
[DEBUG] PCI: 00:00:15.0 subsystem <- 8086/54e8
[DEBUG] PCI: 00:00:15.0 cmd <- 02
[DEBUG] PCI: 00:00:15.1 subsystem <- 8086/54e9
[DEBUG] PCI: 00:00:15.1 cmd <- 02
[DEBUG] PCI: 00:00:15.2 subsystem <- 8086/54ea
[DEBUG] PCI: 00:00:15.2 cmd <- 02
[DEBUG] PCI: 00:00:15.3 subsystem <- 8086/54eb
[DEBUG] PCI: 00:00:15.3 cmd <- 02
[DEBUG] PCI: 00:00:16.0 subsystem <- 8086/54e0
[DEBUG] PCI: 00:00:16.0 cmd <- 02
[DEBUG] PCI: 00:00:1a.0 subsystem <- 8086/54c4
[DEBUG] PCI: 00:00:1a.0 cmd <- 06
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/54be
[DEBUG] PCI: 00:00:1c.0 cmd <- 00
[DEBUG] PCI: 00:00:1e.0 subsystem <- 8086/54a8
[DEBUG] PCI: 00:00:1e.0 cmd <- 02
[DEBUG] PCI: 00:00:1e.2 subsystem <- 8086/54aa
[DEBUG] PCI: 00:00:1e.2 cmd <- 02
[DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/5481
[DEBUG] PCI: 00:00:1f.0 cmd <- 407
[DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/54c8
[DEBUG] PCI: 00:00:1f.3 cmd <- 02
[DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/54a3
[DEBUG] PCI: 00:00:1f.4 cmd <- 03
[DEBUG] PCI: 00:00:1f.5 subsystem <- 8086/54a4
[DEBUG] PCI: 00:00:1f.5 cmd <- 406
[INFO ] done.
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 1 / 194 ms
[DEBUG] ME: Version: 16.50.0.1146
[DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 10 / 4 ms
[INFO ] Initializing devices...
[DEBUG] PCI: 00:00:00.0 init
[INFO ] CPU TDP = 6 Watts
[INFO ] CPU PL1 = 6 Watts
[INFO ] CPU PL2 = 25 Watts
[INFO ] CPU PL4 = 78 Watts
[DEBUG] PCI: 00:00:00.0 init finished in 14 msecs
[DEBUG] PCI: 00:00:02.0 init
[WARN ] CBFS: 'vbt.bin' not found.
[ERROR] Could not find or load vbt.bin CBFS file
[WARN ] CBFS: 'pci8086,46d1.rom' not found.
[DEBUG] PCI Option ROM loading disabled for PCI: 00:00:02.0
[ERROR] GMA: VBT couldn't be found
[WARN ] CBFS: 'pci8086,46d1.rom' not found.
[DEBUG] PCI Option ROM loading disabled for PCI: 00:00:02.0
[DEBUG] PCI: 00:00:02.0 init finished in 40 msecs
[DEBUG] PCI: 00:00:14.0 init
[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:15.0 init
[DEBUG] I2C bus 0 version 0x3230302a
[INFO ] DW I2C bus 0 at 0xbeebb000 (400 KHz)
[DEBUG] PCI: 00:00:15.0 init finished in 10 msecs
[DEBUG] PCI: 00:00:15.1 init
[DEBUG] I2C bus 1 version 0x3230302a
[INFO ] DW I2C bus 1 at 0xbeeba000 (400 KHz)
[DEBUG] PCI: 00:00:15.1 init finished in 10 msecs
[DEBUG] PCI: 00:00:15.2 init
[DEBUG] I2C bus 2 version 0x3230302a
[INFO ] DW I2C bus 2 at 0xbeeb9000 (400 KHz)
[DEBUG] PCI: 00:00:15.2 init finished in 10 msecs
[DEBUG] PCI: 00:00:15.3 init
[DEBUG] I2C bus 3 version 0x3230302a
[INFO ] DW I2C bus 3 at 0xbeeb8000 (400 KHz)
[DEBUG] PCI: 00:00:15.3 init finished in 10 msecs
[DEBUG] PCI: 00:00:16.0 init
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:1a.0 init
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:1c.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1c.0 init finished in 4 msecs
[DEBUG] PCI: 00:00:1f.0 init
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[DEBUG] PCI: 00:00:1f.0 init finished in 26 msecs
[DEBUG] PCI: 00:00:1f.2 init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:00:1f.2 init finished in 7 msecs
[DEBUG] PCI: 00:00:1f.3 init
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
[DEBUG] PCI: 00:00:1f.4 init
[DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs
[DEBUG] PNP: 002e.1 init
[DEBUG] PNP: 002e.1 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 2 / 288 ms
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00:02.0 final
[DEBUG] PCI: 00:00:16.0 final
[DEBUG] PCI: 00:00:1f.2 final
[DEBUG] PCI: 00:00:1f.4 final
[INFO ] Devices finalized
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 23 ms
[DEBUG] ME: HFSTS1 : 0x90000255
[DEBUG] ME: HFSTS2 : 0x39850106
[DEBUG] ME: HFSTS3 : 0x00000020
[DEBUG] ME: HFSTS4 : 0x00004000
[DEBUG] ME: HFSTS5 : 0x00000000
[DEBUG] ME: HFSTS6 : 0x00400002
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: SPI Protection Mode Enabled : NO
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: D0i3 Support : YES
[DEBUG] ME: Low Power State Enabled : NO
[DEBUG] ME: CPU Replaced : NO
[DEBUG] ME: CPU Replacement Valid : YES
[DEBUG] ME: Current Working State : 5
[DEBUG] ME: Current Operation State : 1
[DEBUG] ME: Current Operation Mode : 0
[DEBUG] ME: Error Code : 0
[DEBUG] ME: FPFs Committed : NO
[DEBUG] ME: Enhanced Debug Mode : NO
[DEBUG] ME: CPU Debug Disabled : YES
[DEBUG] ME: TXT Support : NO
[DEBUG] ME: Manufacturing Vars Locked : NO
[DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 148 ms
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x55440 size 0x42e3 in mcache @0x76c0d1f8
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 76a06000.
[DEBUG] ACPI: * FACS
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * FACP
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] Found 1 CPU(s) with 4/4 physical/logical core(s) each.
[DEBUG] PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
[WARN ] Unknown min d_state for PCI: 00:1a.0
[WARN ] Unknown min d_state for PCI: 00:1f.4
[WARN ] Unknown min d_state for PCI: 00:1a.0
[WARN ] Unknown min d_state for PCI: 00:1f.4
[INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
[INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:00:1f.2
[INFO ] \_SB.DPTF: Intel DPTF at GENERIC: 0.0
[DEBUG] ACPI: * SSDT
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] ACPI: * LPIT
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * APIC
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] ACPI: * SPCR
[DEBUG] ACPI: added table 6/32, length now 84
[DEBUG] current = 76a0c4e0
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 7/32, length now 92
[DEBUG] acpi_write_dbg2_pci_uart: Device not found
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 8/32, length now 100
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 26032 bytes.
[DEBUG] smbios_write_tables: 769fe000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '96a61745ea29-dirty'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[DEBUG] SMBIOS tables: 1250 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum e93b
[DEBUG] Writing coreboot table at 0x76a2a000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-00000000769fdfff: RAM
[DEBUG] 4. 00000000769fe000-0000000076aa1fff: CONFIGURATION TABLES
[DEBUG] 5. 0000000076aa2000-0000000076bfcfff: RAMSTAGE
[DEBUG] 6. 0000000076bfd000-0000000076ffffff: CONFIGURATION TABLES
[DEBUG] 7. 0000000077000000-00000000803fffff: RESERVED
[DEBUG] 8. 00000000c0000000-00000000cfffffff: RESERVED
[DEBUG] 9. 00000000f8000000-00000000f9ffffff: RESERVED
[DEBUG] 10. 00000000fb000000-00000000fb000fff: RESERVED
[DEBUG] 11. 00000000fc800000-00000000fe7fffff: RESERVED
[DEBUG] 12. 00000000feb00000-00000000feb7ffff: RESERVED
[DEBUG] 13. 00000000fec00000-00000000fecfffff: RESERVED
[DEBUG] 14. 00000000fed40000-00000000fed6ffff: RESERVED
[DEBUG] 15. 00000000fed80000-00000000fed87fff: RESERVED
[DEBUG] 16. 00000000fed90000-00000000fed92fff: RESERVED
[DEBUG] 17. 00000000feda0000-00000000feda1fff: RESERVED
[DEBUG] 18. 00000000fedc0000-00000000feddffff: RESERVED
[DEBUG] 19. 00000000ff000000-00000000ffffffff: RESERVED
[DEBUG] 20. 0000000100000000-000000027fbfffff: RAM
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
[DEBUG] Wrote coreboot table at: 0x76a2a000, 0x4e0 bytes, checksum 5cbd
[DEBUG] coreboot table: 1272 bytes.
[DEBUG] IMD ROOT 0. 0x76fff000 0x00001000
[DEBUG] IMD SMALL 1. 0x76ffe000 0x00001000
[DEBUG] FSP MEMORY 2. 0x76c4e000 0x003b0000
[DEBUG] CONSOLE 3. 0x76c0e000 0x00040000
[DEBUG] RO MCACHE 4. 0x76c0d000 0x000003ec
[DEBUG] TIME STAMP 5. 0x76c0c000 0x00000910
[DEBUG] MEM INFO 6. 0x76c0b000 0x00000f48
[DEBUG] AFTER CAR 7. 0x76bfd000 0x0000e000
[DEBUG] RAMSTAGE 8. 0x76aa1000 0x0015c000
[DEBUG] REFCODE 9. 0x76a42000 0x0005f000
[DEBUG] SMM BACKUP 10. 0x76a32000 0x00010000
[DEBUG] COREBOOT 11. 0x76a2a000 0x00008000
[DEBUG] ACPI 12. 0x76a06000 0x00024000
[DEBUG] SMBIOS 13. 0x769fe000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x76ffec00 0x00000400
[DEBUG] FSP RUNTIME 1. 0x76ffebe0 0x00000004
[DEBUG] FMAP 2. 0x76ffeb00 0x000000e0
[DEBUG] POWER STATE 3. 0x76ffeaa0 0x00000044
[DEBUG] FSPM VERSION 4. 0x76ffea80 0x00000004
[DEBUG] ROMSTAGE 5. 0x76ffea60 0x00000004
[DEBUG] ROMSTG STCK 6. 0x76ffe9a0 0x000000a8
[DEBUG] ACPI GNVS 7. 0x76ffe960 0x00000038
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 4 / 520 ms
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
[DEBUG] 0x0000000077000000 - 0x00000000cfffffff size 0x59000000 type 0
[DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1
[DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000027fbfffff size 0x17fc00000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 6/6.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
[DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
[DEBUG] MTRR: 3 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1
[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] LAPIC 0x6 in XAPIC mode.
[INFO ] LAPIC 0x4 in XAPIC mode.
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x6 setup mtrr for CPU physical address size: 39 bits
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x2 setup mtrr for CPU physical address size: 39 bits
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x4 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: TEMPORARY Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
[DEBUG] 0x0000000077000000 - 0x00000000feffffff size 0x88000000 type 0
[DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5
[DEBUG] 0x0000000100000000 - 0x000000027fbfffff size 0x17fc00000 type 6
[DEBUG] MTRR: default type WB/UC MTRR counts: 10/6.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
[DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
[DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5
[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled
[DEBUG] BS: BS_WRITE_TABLES exit times (exec / console): 227 / 341 ms
[INFO ] CBFS: Found 'fallback/payload' @0x16f500 size 0x11bc0 in mcache @0x76c0d330
[DEBUG] Checking segment from ROM address 0xff77f72c
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xff77f748
[DEBUG] Loading segment from ROM address 0xff77f72c
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000de100 memsize 0x21f00 srcaddr 0xff77f764 filesize 0x11b88
[DEBUG] Loading Segment: addr: 0x000de100 memsz: 0x0000000000021f00 filesz: 0x0000000000011b88
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xff77f748
[DEBUG] Entry Point 0x000fd247
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 41 / 76 ms
[INFO ] coreboot skipped calling FSP notify phase: 00000040.
[INFO ] coreboot skipped calling FSP notify phase: 000000f0.
[DEBUG] BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 14 ms
[DEBUG] Finalizing chipset.
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] HECI: Sending End-of-Post
[INFO ] CSE: EOP requested action: continue boot
[WARN ] HECI: CSE device 16.1 is disabled
[WARN ] HECI: CSE device 16.2 is disabled
[WARN ] HECI: CSE device 16.3 is disabled
[WARN ] HECI: CSE device 16.4 is disabled
[WARN ] HECI: CSE device 16.5 is disabled
[DEBUG] BS: BS_PAYLOAD_BOOT entry times (exec / console): 3 / 49 ms
[DEBUG] mp_park_aps done after 0 msecs.
[DEBUG] Jumping to boot code at 0x000fd247(0x76a2a000)
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
BUILD: gcc: (coreboot toolchain v2024-07-27_78d25455) 13.2.0 binutils: (GNU Binutils) 2.42
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
BUILD: gcc: (coreboot toolchain v2024-07-27_78d25455) 13.2.0 binutils: (GNU Binutils) 2.42
Found coreboot cbmem console @ 76c0e000
Found mainboard LattePanda MU_8G
Relocating init from 0x000df860 to 0x759f0b60 (size 54272)
Found CBFS header at 0xff61022c
multiboot: eax=76ae2ad8, ebx=76ae2aa4
Found 21 PCI devices (max PCI bus is 01)
Copying SMBIOS from 0x769fe000 to 0x000f5ae0
Copying SMBIOS 3.0 from 0x769fe020 to 0x000f5ac0
Copying ACPI RSDP from 0x76a06000 to 0x000f5a90
table(50434146)=0x76a0a580 (via xsdt)
Using pmtimer, ioport 0x1808
Scan for VGA option rom
Turning on vga text mode console
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
PCI: XHCI at 00:0d.0 (mmio 0xbeed0000)
XHCI init: regs @ 0xbeed0000, 3 ports, 64 slots, 32 byte contexts
XHCI protocol USB 2.00, 1 ports (offset 1), def 3019
XHCI protocol USB 3.20, 2 ports (offset 2), def 4000
XHCI extcap 0xc0 @ 0xbeed8070
XHCI extcap 0x1 @ 0xbeed846c
XHCI extcap 0xc6 @ 0xbeed84f4
XHCI extcap 0xc7 @ 0xbeed8500
XHCI extcap 0xc2 @ 0xbeed8600
XHCI extcap 0xa @ 0xbeed8700
XHCI extcap 0xc3 @ 0xbeed8740
XHCI extcap 0xd1 @ 0xbeed8800
XHCI extcap 0xce @ 0xbeed8900
XHCI extcap 0xc8 @ 0xbeed8cfc
XHCI extcap 0xc9 @ 0xbeed8e10
XHCI extcap 0xca @ 0xbeed8e58
XHCI extcap 0xcc @ 0xbeed90a0
XHCI extcap 0xcd @ 0xbeed91b0
XHCI extcap 0xd2 @ 0xbeed92ac
XHCI extcap 0xcf @ 0xbeed9400
XHCI extcap 0xd3 @ 0xbeed9600
PCI: XHCI at 00:14.0 (mmio 0xbeec0000)
XHCI init: regs @ 0xbeec0000, 16 ports, 64 slots, 32 byte contexts
XHCI protocol USB 2.00, 12 ports (offset 1), def 3019
XHCI protocol USB 3.10, 4 ports (offset 13), def 8000
XHCI extcap 0xc0 @ 0xbeec8070
XHCI extcap 0x1 @ 0xbeec846c
XHCI extcap 0xc6 @ 0xbeec84f4
XHCI extcap 0xc7 @ 0xbeec8500
XHCI extcap 0xc2 @ 0xbeec8600
XHCI extcap 0xa @ 0xbeec8700
XHCI extcap 0xc3 @ 0xbeec8740
XHCI extcap 0xc4 @ 0xbeec8800
XHCI extcap 0xce @ 0xbeec8900
XHCI extcap 0xc8 @ 0xbeec8cfc
XHCI extcap 0xc9 @ 0xbeec8e10
XHCI extcap 0xca @ 0xbeec8e58
XHCI extcap 0xcb @ 0xbeec9000
XHCI extcap 0xcc @ 0xbeec90a0
XHCI extcap 0xcd @ 0xbeec91b0
WARNING - Timeout at i8042_flush:71!
Searching bootorder for: /pci@i0cf8/*@1a
Searching bootorder for: HALT
Found 0 lpt ports
Found 1 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/coreinfo
XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
xhci_realloc_pipe: reconf ctl endpoint pkt size: 8 -> 32
USB keyboard initialized
XHCI no devices found
XHCI port #5: 0x00200a03, powered, enabled, pls 0, speed 2 [Low]
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
Space available for UMB: c0000-ec000, f5300-f5a90
Returned 16490496 bytes of ZoneHigh
e820 map has 18 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000769b8000 = 1 RAM
4: 00000000769b8000 - 0000000080400000 = 2 RESERVED
5: 00000000c0000000 - 00000000d0000000 = 2 RESERVED
6: 00000000f8000000 - 00000000fa000000 = 2 RESERVED
7: 00000000fb000000 - 00000000fb001000 = 2 RESERVED
8: 00000000fc800000 - 00000000fe800000 = 2 RESERVED
9: 00000000feb00000 - 00000000feb80000 = 2 RESERVED
10: 00000000fec00000 - 00000000fed00000 = 2 RESERVED
11: 00000000fed40000 - 00000000fed70000 = 2 RESERVED
12: 00000000fed80000 - 00000000fed88000 = 2 RESERVED
13: 00000000fed90000 - 00000000fed93000 = 2 RESERVED
14: 00000000feda0000 - 00000000feda2000 = 2 RESERVED
15: 00000000fedc0000 - 00000000fede0000 = 2 RESERVED
16: 00000000ff000000 - 0000000100000000 = 2 RESERVED
17: 0000000100000000 - 000000027fc00000 = 1 RAM
enter handle_19:
NULL
Booting from CBFS...
Run img/memtest
Calling addr 0x00040000
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