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KunYi/mu_res_dbg.log

Created August 12, 2024 11:01
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LattePanda_MU_DebugResource.log
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mu_res_dbg.log
[NOTE ] coreboot-24.05-707-gc64bf8155bc3-dirty Tue Aug 06 14:33:11 UTC 2024 x86_32 bootblock starting (log level: 8)...
[DEBUG] CPU: Intel(R) N100
[DEBUG] CPU: ID b06e0, Alderlake-N Platform, ucode: 00000017
[DEBUG] CPU: AES supported, TXT NOT supported, VT supported
[INFO ] Cache: Level 3: Associativity = 12 Partitions = 1 Line Size = 64 Sets = 8192
[INFO ] Cache size = 6 MiB
[DEBUG] MCH: device id 461c (rev 00) is Alderlake-N
[DEBUG] PCH: device id 5481 (rev 00) is Alderlake-N SKU
[DEBUG] IGD: device id 46d1 (rev 00) is Alderlake N GT2
[INFO ] PMC: Using default GPE route.
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0xc50000.
[DEBUG] FMAP: base = 0xff000000 size = 0x1000000 #areas = 5
[DEBUG] FMAP: area COREBOOT found @ c50200 (3866112 bytes)
[INFO ] CBFS: mcache @0xfef8c200 built for 17 files, used 0x388 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/romstage' @0x21d40 size 0x11b80 in mcache @0xfef8c28c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 105 ms
[NOTE ] coreboot-24.05-707-gc64bf8155bc3-dirty Tue Aug 06 14:33:11 UTC 2024 x86_32 romstage starting (log level: 8)...
[DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
[DEBUG] TCO_STS: 0000 0000
[DEBUG] GEN_PMCON: d0015038 00002200
[DEBUG] GBLRST_CAUSE: 00000000 00000000
[DEBUG] HPR_CAUSE0: 00000000
[DEBUG] prev_sleep_state 5 (S5)
[INFO ] OC Watchdog: disabling watchdog timer
[DEBUG] Abort disabling TXT, as CPU is not TXT capable.
[DEBUG] FMAP: area COREBOOT found @ c50200 (3866112 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'fspm.bin' @0x59dc0 size 0xc0000 in mcache @0xfef8c460
[DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
[SPEW ] MRC cache found, size 63176 bytes
[SPEW ] bootmode is set to: 2 (boot assuming no config change)
[INFO ] SPD index is 0x0
[DEBUG] SPD index = 0
[INFO ] CBFS: Found 'spd.bin' @0x53a80 size 0x1000 in mcache @0xfef8c3b8
[INFO ] SPD: module type is LPDDR5
[INFO ] SPD: module part number is
[INFO ] SPD: banks 8, ranks 1, rows 16, columns 11, density 16384 Mb
[INFO ] SPD: device width 16 bits, bus width 16 bits
[INFO ] SPD: module size is 2048 MB (per channel)
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x76fff000 254 entries.
[DEBUG] IMD: root @ 0x76ffec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7bbff000 254 entries.
[DEBUG] IMD: root @ 0x7bbfec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] 4 DIMMs found
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7b800000 0x800000
[DEBUG] Subregion 0: 0x7b800000 0x200000
[DEBUG] Subregion 1: 0x7ba00000 0x200000
[DEBUG] Subregion 2: 0x7bc00000 0x400000
[DEBUG] top_of_ram = 0x77000000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x15ea40 size 0x6070 in mcache @0xfef8c4d4
[DEBUG] Loading module at 0x76bfe000 with entry 0x76bfe031. filesize: 0x5c88 memsize: 0xc040
[DEBUG] Processing 234 relocs. Offset value of 0x74bfe000
[SPEW ] CLFLUSH [0x76bfe000, 0x76c0a040]
[SPEW ] CLFLUSH [0x76c03c80, 0x76c03c84]
[SPEW ] CLFLUSH [0x76ffe960, 0x76ffea08]
[DEBUG] BS: romstage times (exec / console): total (unknown) / 291 ms
[SPEW ] CLFLUSH [0x76bfd000, 0x77000000]
[SPEW ] CLFLUSH [0x7ba00000, 0x7bc00000]
[NOTE ] coreboot-24.05-707-gc64bf8155bc3-dirty Tue Aug 06 14:33:11 UTC 2024 x86_32 postcar starting (log level: 8)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ c50200 (3866112 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'fallback/ramstage' @0x33940 size 0x1ea9f in mcache @0x76c0d0ec
[DEBUG] Loading module at 0x76aa4000 with entry 0x76aa4000. filesize: 0x3ffc0 memsize: 0x158850
[DEBUG] Processing 4677 relocs. Offset value of 0x72aa4000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 58 ms
[NOTE ] coreboot-24.05-707-gc64bf8155bc3-dirty Tue Aug 06 14:33:11 UTC 2024 x86_32 ramstage starting (log level: 8)...
[DEBUG] Normal boot
[DEBUG] microcode: sig=0xb06e0 pf=0x1 revision=0x17
[DEBUG] FMAP: area COREBOOT found @ c50200 (3866112 bytes)
[INFO ] MMAP window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x21c00 in mcache @0x76c0d02c
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CBFS: Found 'fsps.bin' @0x119e00 size 0x44c05 in mcache @0x76c0d2a0
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Setting up SMI for CPU
[DEBUG] IED base = 0x7bc00000
[DEBUG] IED size = 0x00400000
[INFO ] Will perform SMM setup.
[INFO ] CPU: Intel(R) N100.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[SPEW ] CLFLUSH [0x30000, 0x30178]
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x2 in XAPIC mode.
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 2, MCU rev: 0x00000017
[INFO ] LAPIC 0x4 in XAPIC mode.
[INFO ] LAPIC 0x6 in XAPIC mode.
[SPEW ] APs are ready after 0us
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[SPEW ] APs are ready after 0us
[INFO ] AP: slot 3 apic_id 4, MCU rev: 0x00000017
[INFO ] AP: slot 2 apic_id 6, MCU rev: 0x00000017
[SPEW ] APs are ready after 11700us
[SPEW ] smm_setup_relocation_handler: enter
[SPEW ] smm_setup_relocation_handler: exit
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1c0 memsize: 0x1c0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x76ac1e54
[DEBUG] Installing permanent SMM handler to 0x7b800000
[DEBUG] HANDLER [0x7b9fd000-0x7b9ffde8]
[DEBUG] CPU 0
[DEBUG] ss0 [0x7b9fcc00-0x7b9fd000]
[DEBUG] stub0 [0x7b9f5000-0x7b9f51c0]
[DEBUG] CPU 1
[DEBUG] ss1 [0x7b9fc800-0x7b9fcc00]
[DEBUG] stub1 [0x7b9f4c00-0x7b9f4dc0]
[DEBUG] CPU 2
[DEBUG] ss2 [0x7b9fc400-0x7b9fc800]
[DEBUG] stub2 [0x7b9f4800-0x7b9f49c0]
[DEBUG] CPU 3
[DEBUG] ss3 [0x7b9fc000-0x7b9fc400]
[DEBUG] stub3 [0x7b9f4400-0x7b9f45c0]
[DEBUG] stacks [0x7b800000-0x7b802000]
[DEBUG] Loading module at 0x7b9fd000 with entry 0x7b9fdbcf. filesize: 0x2cd0 memsize: 0x2de8
[DEBUG] Processing 208 relocs. Offset value of 0x7b9fd000
[DEBUG] FMAP: area SMMSTORE found @ c10000 (262144 bytes)
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
[DEBUG] smm store: 4 # blocks with size 0x10000
[DEBUG] Loading module at 0x7b9f5000 with entry 0x7b9f5000. filesize: 0x1c0 memsize: 0x1c0
[DEBUG] Processing 9 relocs. Offset value of 0x7b9f5000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000
[DEBUG] SMM Module: placing smm entry code at 7b9f4c00, cpu # 0x1
[SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4c00 0x1c0 bytes
[DEBUG] SMM Module: placing smm entry code at 7b9f4800, cpu # 0x2
[SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4800 0x1c0 bytes
[DEBUG] SMM Module: placing smm entry code at 7b9f4400, cpu # 0x3
[SPEW ] smm_place_entry_code: copying from 7b9f5000 to 7b9f4400 0x1c0 bytes
[DEBUG] SMM Module: stub loaded at 7b9f5000. Will call 0x7b9fdbcf
[DEBUG] Clearing SMI status registers
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ed000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7b9ed000 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7b9ec400 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7b9ec800 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ecc00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7b9ecc00 IEDBASE=0x7bc00000
[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
[DEBUG] Relocation complete.
[SPEW ] APs are ready after 88200us
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 7
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #3
[INFO ] Initializing CPU #2
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] CPU: vendor Intel device b06e0
[DEBUG] CPU: family 06, model be, stepping 00
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 7
[DEBUG] cpu: energy policy set to 7
[DEBUG] Clearing out pending MCEs
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #1 initialized
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #2 initialized
[DEBUG] cpu: energy policy set to 7
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] CPU #3 initialized
[SPEW ] APs are ready after 97600us
[INFO ] bsp_do_flight_plan done after 542 msecs.
[DEBUG] CPU: frequency set to 3400 MHz
[DEBUG] Enabling SMIs.
[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 296 / 498 ms
[ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
[ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
[DEBUG] All HSPHY ports disabled, skipping HSPHY loading
[INFO ] CBFS: Found 'vbt.bin' @0x59700 size 0x4ef in mcache @0x76c0d230
[INFO ] Found a VBT of 9216 bytes
[INFO ] PCI 1.0, PIN A, using IRQ #16
[INFO ] PCI 2.0, PIN A, using IRQ #17
[INFO ] PCI 4.0, PIN A, using IRQ #18
[INFO ] PCI 5.0, PIN A, using IRQ #16
[INFO ] PCI 6.0, PIN A, using IRQ #16
[INFO ] PCI 6.2, PIN C, using IRQ #18
[INFO ] PCI 7.0, PIN A, using IRQ #19
[INFO ] PCI 7.1, PIN B, using IRQ #20
[INFO ] PCI 7.2, PIN C, using IRQ #21
[INFO ] PCI 7.3, PIN D, using IRQ #22
[INFO ] PCI 8.0, PIN A, using IRQ #23
[INFO ] PCI D.0, PIN A, using IRQ #17
[INFO ] PCI D.1, PIN B, using IRQ #19
[INFO ] PCI 10.0, PIN A, using IRQ #24
[INFO ] PCI 10.1, PIN B, using IRQ #25
[INFO ] PCI 10.6, PIN C, using IRQ #20
[INFO ] PCI 10.7, PIN D, using IRQ #21
[INFO ] PCI 11.0, PIN A, using IRQ #26
[INFO ] PCI 11.1, PIN B, using IRQ #27
[INFO ] PCI 11.2, PIN C, using IRQ #28
[INFO ] PCI 11.3, PIN D, using IRQ #29
[INFO ] PCI 12.0, PIN A, using IRQ #30
[INFO ] PCI 12.6, PIN B, using IRQ #31
[INFO ] PCI 12.7, PIN C, using IRQ #22
[INFO ] PCI 13.0, PIN A, using IRQ #32
[INFO ] PCI 13.1, PIN B, using IRQ #33
[INFO ] PCI 13.2, PIN C, using IRQ #34
[INFO ] PCI 13.3, PIN D, using IRQ #35
[INFO ] PCI 14.0, PIN B, using IRQ #23
[INFO ] PCI 14.1, PIN A, using IRQ #36
[INFO ] PCI 14.3, PIN C, using IRQ #17
[INFO ] PCI 15.0, PIN A, using IRQ #37
[INFO ] PCI 15.1, PIN B, using IRQ #38
[INFO ] PCI 15.2, PIN C, using IRQ #39
[INFO ] PCI 15.3, PIN D, using IRQ #40
[INFO ] PCI 16.0, PIN A, using IRQ #18
[INFO ] PCI 16.1, PIN B, using IRQ #19
[INFO ] PCI 16.2, PIN C, using IRQ #20
[INFO ] PCI 16.3, PIN D, using IRQ #21
[INFO ] PCI 16.4, PIN A, using IRQ #18
[INFO ] PCI 16.5, PIN B, using IRQ #19
[INFO ] PCI 17.0, PIN A, using IRQ #22
[INFO ] PCI 19.0, PIN A, using IRQ #41
[INFO ] PCI 19.1, PIN B, using IRQ #42
[INFO ] PCI 19.2, PIN C, using IRQ #43
[INFO ] PCI 1A.0, PIN A, using IRQ #23
[INFO ] PCI 1C.0, PIN A, using IRQ #16
[INFO ] PCI 1C.1, PIN B, using IRQ #17
[INFO ] PCI 1C.2, PIN C, using IRQ #18
[INFO ] PCI 1C.3, PIN D, using IRQ #19
[INFO ] PCI 1C.4, PIN A, using IRQ #16
[INFO ] PCI 1C.5, PIN B, using IRQ #17
[INFO ] PCI 1C.6, PIN C, using IRQ #18
[INFO ] PCI 1C.7, PIN D, using IRQ #19
[INFO ] PCI 1D.0, PIN A, using IRQ #16
[INFO ] PCI 1D.1, PIN B, using IRQ #17
[INFO ] PCI 1D.2, PIN C, using IRQ #18
[INFO ] PCI 1D.3, PIN D, using IRQ #19
[INFO ] PCI 1E.0, PIN A, using IRQ #20
[INFO ] PCI 1E.1, PIN B, using IRQ #21
[INFO ] PCI 1E.2, PIN C, using IRQ #44
[INFO ] PCI 1E.3, PIN D, using IRQ #45
[INFO ] PCI 1F.3, PIN B, using IRQ #23
[INFO ] PCI 1F.4, PIN C, using IRQ #20
[INFO ] PCI 1F.6, PIN D, using IRQ #21
[INFO ] PCI 1F.7, PIN A, using IRQ #22
[INFO ] IRQ: Using dynamically assigned PCI IO-APIC IRQs
[DEBUG] WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[DEBUG] Detected 4 core, 4 thread CPU.
[INFO ] FSPS, status=0x00000000
[DEBUG] Display FSP Version Info HOB
[DEBUG] Reference Code - CPU = c.e0.89.40
[DEBUG] uCode Version = 0.0.0.17
[DEBUG] TXT ACM version = ff.ff.ff.ffff
[DEBUG] Reference Code - ME = c.e0.89.40
[DEBUG] MEBx version = 0.0.0.0
[DEBUG] ME Firmware Version = Consumer SKU
[DEBUG] Reference Code - PCH = c.e0.89.40
[DEBUG] PCH-CRID Status = Disabled
[DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff
[DEBUG] PCH-CRID New Value = ff.ff.ff.ffff
[DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff
[DEBUG] PCH Hsio Version = 4.0.0.0
[DEBUG] Reference Code - SA - System Agent = c.e0.89.40
[DEBUG] Reference Code - MRC = 0.0.4.4a
[DEBUG] SA - PCIe Version = c.e0.89.40
[DEBUG] SA-CRID Status = Disabled
[DEBUG] SA-CRID Original Value = 0.0.0.0
[DEBUG] SA-CRID New Value = 0.0.0.0
[DEBUG] OPROM - VBIOS = ff.ff.ff.ffff
[DEBUG] IO Manageability Engine FW Version = 23.0.8.0
[DEBUG] PHY Build Version = 0.0.0.0
[DEBUG] Thunderbolt(TM) FW Version = 0.0.0.0
[DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff
[INFO ] Found PCIe Root Port #3 at PCI: 00:1c.0.
[INFO ] Found PCIe Root Port #7 at PCI: 00:1c.6.
[INFO ] Remapping PCIe Root Port #3 from PCI: 00:00:1c.2 to new function number 0.
[NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #4 (originally PCI: 00:00:1c.3) which was enabled in devicetree, removing and disabling.
[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 479 / 650 ms
[INFO ] Enumerating buses...
[SPEW ] Show all devs... Before device enumeration.
[SPEW ] Root Device: enabled 1
[SPEW ] CPU_CLUSTER: 0: enabled 1
[SPEW ] DOMAIN: 00000000: enabled 1
[SPEW ] GPIO: 0: enabled 1
[SPEW ] PCI: 00:00:00.0: enabled 1
[SPEW ] PCI: 00:00:01.0: enabled 0
[SPEW ] PCI: 00:00:01.1: enabled 0
[SPEW ] PCI: 00:00:02.0: enabled 1
[SPEW ] PCI: 00:00:04.0: enabled 0
[SPEW ] PCI: 00:00:05.0: enabled 0
[SPEW ] PCI: 00:00:06.0: enabled 0
[SPEW ] PCI: 00:00:06.2: enabled 0
[SPEW ] PCI: 00:00:07.0: enabled 0
[SPEW ] PCI: 00:00:07.1: enabled 0
[SPEW ] PCI: 00:00:07.2: enabled 0
[SPEW ] PCI: 00:00:07.3: enabled 0
[SPEW ] PCI: 00:00:08.0: enabled 0
[SPEW ] PCI: 00:00:09.0: enabled 0
[SPEW ] PCI: 00:00:0a.0: enabled 0
[SPEW ] PCI: 00:00:0d.0: enabled 0
[SPEW ] PCI: 00:00:0d.1: enabled 0
[SPEW ] PCI: 00:00:0d.2: enabled 0
[SPEW ] PCI: 00:00:0d.3: enabled 0
[SPEW ] PCI: 00:00:0e.0: enabled 0
[SPEW ] PCI: 00:00:10.0: enabled 0
[SPEW ] PCI: 00:00:10.1: enabled 0
[SPEW ] PCI: 00:00:10.6: enabled 0
[SPEW ] PCI: 00:00:10.7: enabled 0
[SPEW ] PCI: 00:00:12.0: enabled 0
[SPEW ] PCI: 00:00:12.6: enabled 0
[SPEW ] PCI: 00:00:12.7: enabled 0
[SPEW ] PCI: 00:00:13.0: enabled 0
[SPEW ] PCI: 00:00:14.0: enabled 1
[SPEW ] PCI: 00:00:14.1: enabled 0
[SPEW ] PCI: 00:00:14.2: enabled 0
[SPEW ] PCI: 00:00:14.3: enabled 0
[SPEW ] PCI: 00:00:15.0: enabled 0
[SPEW ] PCI: 00:00:15.1: enabled 0
[SPEW ] PCI: 00:00:15.2: enabled 1
[SPEW ] PCI: 00:00:15.3: enabled 1
[SPEW ] PCI: 00:00:16.0: enabled 1
[SPEW ] PCI: 00:00:16.1: enabled 0
[SPEW ] PCI: 00:00:16.2: enabled 0
[SPEW ] PCI: 00:00:16.3: enabled 0
[SPEW ] PCI: 00:00:16.4: enabled 0
[SPEW ] PCI: 00:00:16.5: enabled 0
[SPEW ] PCI: 00:00:17.0: enabled 0
[SPEW ] PCI: 00:00:19.0: enabled 1
[SPEW ] PCI: 00:00:19.1: enabled 1
[SPEW ] PCI: 00:00:19.2: enabled 0
[SPEW ] PCI: 00:00:1a.0: enabled 1
[SPEW ] PCI: 00:00:1c.0: enabled 0
[SPEW ] PCI: 00:00:1c.1: enabled 0
[SPEW ] PCI: 00:00:1c.0: enabled 1
[SPEW ] PCI: 00:00:1c.3: enabled 0
[SPEW ] PCI: 00:00:1c.4: enabled 0
[SPEW ] PCI: 00:00:1c.5: enabled 0
[SPEW ] PCI: 00:00:1c.6: enabled 1
[SPEW ] PCI: 00:00:1c.7: enabled 0
[SPEW ] PCI: 00:00:1d.0: enabled 0
[SPEW ] PCI: 00:00:1d.1: enabled 0
[SPEW ] PCI: 00:00:1d.2: enabled 0
[SPEW ] PCI: 00:00:1d.3: enabled 0
[SPEW ] PCI: 00:00:1e.0: enabled 1
[SPEW ] PCI: 00:00:1e.1: enabled 0
[SPEW ] PCI: 00:00:1e.2: enabled 1
[SPEW ] PCI: 00:00:1e.3: enabled 0
[SPEW ] PCI: 00:00:1f.0: enabled 1
[SPEW ] PCI: 00:00:1f.1: enabled 1
[SPEW ] PCI: 00:00:1f.2: enabled 1
[SPEW ] PCI: 00:00:1f.3: enabled 1
[SPEW ] PCI: 00:00:1f.4: enabled 1
[SPEW ] PCI: 00:00:1f.5: enabled 1
[SPEW ] PCI: 00:00:1f.6: enabled 0
[SPEW ] PCI: 00:00:1f.7: enabled 0
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] USB0 port 0: enabled 0
[SPEW ] USB0 port 0: enabled 0
[SPEW ] PCI: 00:00:00.0: enabled 1
[SPEW ] PNP: 002e.0: enabled 0
[SPEW ] PNP: 002e.1: enabled 1
[SPEW ] PNP: 002e.4: enabled 1
[SPEW ] PNP: 002e.5: enabled 0
[SPEW ] PNP: 002e.6: enabled 0
[SPEW ] PNP: 002e.7: enabled 0
[SPEW ] PNP: 002e.a: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] USB2 port 0: enabled 0
[SPEW ] USB2 port 1: enabled 0
[SPEW ] USB2 port 2: enabled 0
[SPEW ] USB2 port 3: enabled 0
[SPEW ] USB2 port 4: enabled 0
[SPEW ] USB2 port 5: enabled 0
[SPEW ] USB2 port 6: enabled 0
[SPEW ] USB2 port 7: enabled 0
[SPEW ] USB2 port 8: enabled 0
[SPEW ] USB2 port 9: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] APIC: 00: enabled 1
[SPEW ] APIC: 02: enabled 1
[SPEW ] APIC: 06: enabled 1
[SPEW ] APIC: 04: enabled 1
[SPEW ] Compare with tree...
[SPEW ] Root Device: enabled 1
[SPEW ] CPU_CLUSTER: 0: enabled 1
[SPEW ] APIC: 00: enabled 1
[SPEW ] APIC: 02: enabled 1
[SPEW ] APIC: 06: enabled 1
[SPEW ] APIC: 04: enabled 1
[SPEW ] DOMAIN: 00000000: enabled 1
[SPEW ] GPIO: 0: enabled 1
[SPEW ] PCI: 00:00:00.0: enabled 1
[SPEW ] PCI: 00:00:01.0: enabled 0
[SPEW ] PCI: 00:00:01.1: enabled 0
[SPEW ] PCI: 00:00:02.0: enabled 1
[SPEW ] PCI: 00:00:04.0: enabled 0
[SPEW ] PCI: 00:00:05.0: enabled 0
[SPEW ] PCI: 00:00:06.0: enabled 0
[SPEW ] PCI: 00:00:06.2: enabled 0
[SPEW ] PCI: 00:00:07.0: enabled 0
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] PCI: 00:00:07.1: enabled 0
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] PCI: 00:00:07.2: enabled 0
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] PCI: 00:00:07.3: enabled 0
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] PCI: 00:00:08.0: enabled 0
[SPEW ] PCI: 00:00:09.0: enabled 0
[SPEW ] PCI: 00:00:0a.0: enabled 0
[SPEW ] PCI: 00:00:0d.0: enabled 0
[SPEW ] USB0 port 0: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] PCI: 00:00:0d.1: enabled 0
[SPEW ] PCI: 00:00:0d.2: enabled 0
[SPEW ] PCI: 00:00:0d.3: enabled 0
[SPEW ] PCI: 00:00:0e.0: enabled 0
[SPEW ] PCI: 00:00:10.0: enabled 0
[SPEW ] PCI: 00:00:10.1: enabled 0
[SPEW ] PCI: 00:00:10.6: enabled 0
[SPEW ] PCI: 00:00:10.7: enabled 0
[SPEW ] PCI: 00:00:12.0: enabled 0
[SPEW ] PCI: 00:00:12.6: enabled 0
[SPEW ] PCI: 00:00:12.7: enabled 0
[SPEW ] PCI: 00:00:13.0: enabled 0
[SPEW ] PCI: 00:00:14.0: enabled 1
[SPEW ] USB0 port 0: enabled 0
[SPEW ] USB2 port 0: enabled 0
[SPEW ] USB2 port 1: enabled 0
[SPEW ] USB2 port 2: enabled 0
[SPEW ] USB2 port 3: enabled 0
[SPEW ] USB2 port 4: enabled 0
[SPEW ] USB2 port 5: enabled 0
[SPEW ] USB2 port 6: enabled 0
[SPEW ] USB2 port 7: enabled 0
[SPEW ] USB2 port 8: enabled 0
[SPEW ] USB2 port 9: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] PCI: 00:00:14.1: enabled 0
[SPEW ] PCI: 00:00:14.2: enabled 0
[SPEW ] PCI: 00:00:14.3: enabled 0
[SPEW ] PCI: 00:00:15.0: enabled 0
[SPEW ] PCI: 00:00:15.1: enabled 0
[SPEW ] PCI: 00:00:15.2: enabled 1
[SPEW ] PCI: 00:00:15.3: enabled 1
[SPEW ] PCI: 00:00:16.0: enabled 1
[SPEW ] PCI: 00:00:16.1: enabled 0
[SPEW ] PCI: 00:00:16.2: enabled 0
[SPEW ] PCI: 00:00:16.3: enabled 0
[SPEW ] PCI: 00:00:16.4: enabled 0
[SPEW ] PCI: 00:00:16.5: enabled 0
[SPEW ] PCI: 00:00:17.0: enabled 0
[SPEW ] PCI: 00:00:19.0: enabled 1
[SPEW ] PCI: 00:00:19.1: enabled 1
[SPEW ] PCI: 00:00:19.2: enabled 0
[SPEW ] PCI: 00:00:1a.0: enabled 1
[SPEW ] PCI: 00:00:1c.0: enabled 1
[SPEW ] PCI: 00:00:1c.6: enabled 1
[SPEW ] PCI: 00:00:00.0: enabled 1
[SPEW ] PCI: 00:00:1e.0: enabled 1
[SPEW ] PCI: 00:00:1e.1: enabled 0
[SPEW ] PCI: 00:00:1e.2: enabled 1
[SPEW ] PCI: 00:00:1e.3: enabled 0
[SPEW ] PCI: 00:00:1f.0: enabled 1
[SPEW ] PNP: 002e.0: enabled 0
[SPEW ] PNP: 002e.1: enabled 1
[SPEW ] PNP: 002e.4: enabled 1
[SPEW ] PNP: 002e.5: enabled 0
[SPEW ] PNP: 002e.6: enabled 0
[SPEW ] PNP: 002e.7: enabled 0
[SPEW ] PNP: 002e.a: enabled 0
[SPEW ] PCI: 00:00:1f.1: enabled 1
[SPEW ] PCI: 00:00:1f.2: enabled 1
[SPEW ] PCI: 00:00:1f.3: enabled 1
[SPEW ] PCI: 00:00:1f.4: enabled 1
[SPEW ] PCI: 00:00:1f.5: enabled 1
[SPEW ] PCI: 00:00:1f.6: enabled 0
[SPEW ] PCI: 00:00:1f.7: enabled 0
[DEBUG] Root Device scanning...
[SPEW ] scan_static_bus for Root Device
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[SPEW ] PCI: 00:00:00.0 [8086/0000] ops
[DEBUG] PCI: 00:00:00.0 [8086/461c] enabled
[SPEW ] PCI: 00:00:02.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:02.0 [8086/46d1] enabled
[SPEW ] PCI: 00:00:14.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:14.0 [8086/54ed] enabled
[DEBUG] PCI: 00:00:14.2 [8086/54ef] disabled
[SPEW ] PCI: 00:00:15.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:15.0 [8086/54e8] disabled
[SPEW ] PCI: 00:00:15.2 [8086/0000] bus ops
[DEBUG] PCI: 00:00:15.2 [8086/54ea] enabled
[SPEW ] PCI: 00:00:15.3 [8086/0000] bus ops
[DEBUG] PCI: 00:00:15.3 [8086/54eb] enabled
[SPEW ] PCI: 00:00:16.0 [8086/0000] ops
[DEBUG] PCI: 00:00:16.0 [8086/54e0] enabled
[SPEW ] PCI: 00:00:19.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:19.0 [8086/54c5] enabled
[SPEW ] PCI: 00:00:19.1 [8086/0000] bus ops
[DEBUG] PCI: 00:00:19.1 [8086/54c6] enabled
[SPEW ] PCI: 00:00:19.2 [8086/0000] ops
[DEBUG] PCI: 00:00:19.2 [8086/54c7] disabled
[SPEW ] PCI: 00:00:1a.0 [8086/0000] ops
[DEBUG] PCI: 00:00:1a.0 [8086/54c4] enabled
[SPEW ] PCI: 00:00:1c.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1c.0 [8086/54ba] enabled
[SPEW ] PCI: 00:00:1c.6 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1c.6 [8086/54be] enabled
[SPEW ] PCI: 00:00:1e.0 [8086/0000] ops
[DEBUG] PCI: 00:00:1e.0 [8086/54a8] enabled
[SPEW ] PCI: 00:00:1e.1 [8086/0000] ops
[DEBUG] PCI: 00:00:1e.1 [8086/54a9] disabled
[SPEW ] PCI: 00:00:1e.2 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1e.2 [8086/54aa] enabled
[SPEW ] PCI: 00:00:1f.0 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1f.0 [8086/5481] enabled
[INFO ] PCI: Static device PCI: 00:00:1f.1 not found, disabling it.
[DEBUG] RTC Init
[INFO ] Set power on after power failure.
[INFO ] PMC: Using default GPE route.
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S5
[DEBUG] Disabling Deep S5
[DEBUG] PCI: 00:00:1f.2 [0000/0000] hidden
[SPEW ] PCI: 00:00:1f.3 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1f.3 [8086/54c8] enabled
[SPEW ] PCI: 00:00:1f.4 [8086/0000] bus ops
[DEBUG] PCI: 00:00:1f.4 [8086/54a3] enabled
[SPEW ] PCI: 00:00:1f.5 [8086/0000] ops
[DEBUG] PCI: 00:00:1f.5 [8086/54a4] enabled
[DEBUG] GPIO: 0 enabled
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:00:01.0
[WARN ] PCI: 00:00:01.1
[WARN ] PCI: 00:00:04.0
[WARN ] PCI: 00:00:05.0
[WARN ] PCI: 00:00:06.0
[WARN ] PCI: 00:00:06.2
[WARN ] PCI: 00:00:07.0
[WARN ] PCI: 00:00:07.1
[WARN ] PCI: 00:00:07.2
[WARN ] PCI: 00:00:07.3
[WARN ] PCI: 00:00:08.0
[WARN ] PCI: 00:00:09.0
[WARN ] PCI: 00:00:0a.0
[WARN ] PCI: 00:00:0d.0
[WARN ] PCI: 00:00:0d.1
[WARN ] PCI: 00:00:0d.2
[WARN ] PCI: 00:00:0d.3
[WARN ] PCI: 00:00:0e.0
[WARN ] PCI: 00:00:10.0
[WARN ] PCI: 00:00:10.1
[WARN ] PCI: 00:00:10.6
[WARN ] PCI: 00:00:10.7
[WARN ] PCI: 00:00:12.0
[WARN ] PCI: 00:00:12.6
[WARN ] PCI: 00:00:12.7
[WARN ] PCI: 00:00:13.0
[WARN ] PCI: 00:00:14.1
[WARN ] PCI: 00:00:14.3
[WARN ] PCI: 00:00:15.1
[WARN ] PCI: 00:00:16.1
[WARN ] PCI: 00:00:16.2
[WARN ] PCI: 00:00:16.3
[WARN ] PCI: 00:00:16.4
[WARN ] PCI: 00:00:16.5
[WARN ] PCI: 00:00:17.0
[WARN ] PCI: 00:00:1e.3
[WARN ] PCI: 00:00:1f.1
[WARN ] PCI: 00:00:1f.6
[WARN ] PCI: 00:00:1f.7
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:00:02.0 scanning...
[SPEW ] scan_generic_bus for PCI: 00:00:02.0
[SPEW ] scan_generic_bus for PCI: 00:00:02.0 done
[DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 11 msecs
[DEBUG] PCI: 00:00:14.0 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:14.0
[DEBUG] USB0 port 0 disabled
[SPEW ] scan_static_bus for PCI: 00:00:14.0 done
[DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 14 msecs
[DEBUG] PCI: 00:00:15.2 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:15.2
[SPEW ] scan_static_bus for PCI: 00:00:15.2 done
[DEBUG] scan_bus: bus PCI: 00:00:15.2 finished in 11 msecs
[DEBUG] PCI: 00:00:15.3 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:15.3
[SPEW ] scan_static_bus for PCI: 00:00:15.3 done
[DEBUG] scan_bus: bus PCI: 00:00:15.3 finished in 11 msecs
[DEBUG] PCI: 00:00:19.0 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:19.0
[SPEW ] scan_static_bus for PCI: 00:00:19.0 done
[DEBUG] scan_bus: bus PCI: 00:00:19.0 finished in 11 msecs
[DEBUG] PCI: 00:00:19.1 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:19.1
[SPEW ] scan_static_bus for PCI: 00:00:19.1 done
[DEBUG] scan_bus: bus PCI: 00:00:19.1 finished in 11 msecs
[DEBUG] PCI: 00:00:1c.0 scanning...
[SPEW ] do_pci_scan_bridge for PCI: 00:00:1c.0
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
[DEBUG] PCI: 00:01:00.0 [1987/5021] enabled
[INFO ] PCIe: Common Clock Configuration already enabled
[INFO ] PCIE CLK PM is not supported by endpoint
[INFO ] ASPM: Enabled L1
[INFO ] PCI: 00:01:00.0: Enabled LTR
[INFO ] PCI: 00:01:00.0: Programmed LTR max latencies
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 53 msecs
[DEBUG] PCI: 00:00:1c.6 scanning...
[SPEW ] do_pci_scan_bridge for PCI: 00:00:1c.6
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
[SPEW ] PCI: 00:02:00.0 [10ec/0000] ops
[DEBUG] PCI: 00:02:00.0 [10ec/8168] enabled
[INFO ] PCIe: Common Clock Configuration already enabled
[INFO ] ASPM: Enabled None
[INFO ] PCI: 00:02:00.0: Enabled LTR
[INFO ] PCI: 00:02:00.0: Programmed LTR max latencies
[INFO ] PCI: 00:00:1c.6: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.6 finished in 52 msecs
[DEBUG] PCI: 00:00:1e.2 scanning...
[SPEW ] scan_generic_bus for PCI: 00:00:1e.2
[SPEW ] scan_generic_bus for PCI: 00:00:1e.2 done
[DEBUG] scan_bus: bus PCI: 00:00:1e.2 finished in 11 msecs
[DEBUG] PCI: 00:00:1f.0 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:1f.0
[DEBUG] PNP: 002e.0 disabled
[DEBUG] PNP: 002e.1 enabled
[DEBUG] PNP: 002e.4 enabled
[DEBUG] PNP: 002e.5 disabled
[DEBUG] PNP: 002e.6 disabled
[DEBUG] PNP: 002e.7 disabled
[DEBUG] PNP: 002e.a disabled
[SPEW ] scan_static_bus for PCI: 00:00:1f.0 done
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 37 msecs
[DEBUG] PCI: 00:00:1f.2 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:1f.2
[SPEW ] scan_static_bus for PCI: 00:00:1f.2 done
[DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 11 msecs
[DEBUG] PCI: 00:00:1f.3 scanning...
[SPEW ] scan_static_bus for PCI: 00:00:1f.3
[SPEW ] scan_static_bus for PCI: 00:00:1f.3 done
[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 11 msecs
[DEBUG] PCI: 00:00:1f.4 scanning...
[SPEW ] scan_generic_bus for PCI: 00:00:1f.4
[SPEW ] scan_generic_bus for PCI: 00:00:1f.4 done
[DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 11 msecs
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 819 msecs
[SPEW ] scan_static_bus for Root Device done
[DEBUG] scan_bus: bus Root Device finished in 849 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1796 ms
[INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
[DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
[INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 19 ms
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[SPEW ] Root Device read_resources segment group 0 bus 0
[SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0
[SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0 done
[SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0
[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x0, base: 0xfedc0000, size: 0x20000
[DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x1, base: 0xfeda0000, size: 0x1000
[DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x2, base: 0xfeda1000, size: 0x1000
[DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x3, base: 0xfb000000, size: 0x1000
[DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x4, base: 0xfed80000, size: 0x4000
[DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x5, base: 0xfeb00000, size: 0x80000
[DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x6, base: 0xfed40000, size: 0x10000
[DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x7, base: 0xfed50000, size: 0x20000
[DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x8, base: 0xfec00000, size: 0x100000
[DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x9, base: 0xfc800000, size: 0x2000000
[DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xa, base: 0xfed90000, size: 0x1000
[DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xb, base: 0xfed92000, size: 0x1000
[DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xc, base: 0xfed84000, size: 0x1000
[DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xd, base: 0xfed85000, size: 0x1000
[DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xe, base: 0xfed86000, size: 0x1000
[DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0xf, base: 0xfed87000, size: 0x1000
[DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x10, base: 0xfed91000, size: 0x1000
[DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x11, base: 0xc0000000, size: 0x10000000
[DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x12, base: 0x7c800000, size: 0x3c00000
[DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x13, base: 0x7b800000, size: 0x800000
[DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x14, base: 0x7c000000, size: 0x800000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x15, base: 0x0, size: 0xa0000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x16, base: 0xc0000, size: 0x76f40000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x17, base: 0x77000000, size: 0x9400000
[INFO ] Available memory above 4GB: 6140M
[SPEW ] dev: PCI: 00:00:00.0, index: 0x18, base: 0x100000000, size: 0x17fc00000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x19, base: 0xa0000, size: 0x20000
[SPEW ] dev: PCI: 00:00:00.0, index: 0x1a, base: 0xc0000, size: 0x40000
[SPEW ] PCI: 00:00:14.0 read_resources segment group 0 bus 0
[SPEW ] PCI: 00:00:14.0 read_resources segment group 0 bus 0 done
[SPEW ] PCI: 00:00:1c.0 read_resources segment group 0 bus 1
[SPEW ] PCI: 00:00:1c.0 read_resources segment group 0 bus 1 done
[SPEW ] PCI: 00:00:1c.6 read_resources segment group 0 bus 2
[SPEW ] PCI: 00:00:1c.6 read_resources segment group 0 bus 2 done
[SPEW ] PCI: 00:00:1f.0 read_resources segment group 0 bus 0
[SPEW ] PCI: 00:00:1f.0 read_resources segment group 0 bus 0 done
[SPEW ] dev: PCI: 00:00:1f.2, index: 0x10, base: 0xfe000000, size: 0x10000
[SPEW ] dev: PCI: 00:00:1f.5, index: 0x0, base: 0xff000000, size: 0x1000000
[SPEW ] dev: PCI: 00:00:1f.5, index: 0x1, base: 0xf8000000, size: 0x2000000
[SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0 done
[SPEW ] Root Device read_resources segment group 0 bus 0 done
[INFO ] Done reading resources.
[SPEW ] Show resources in subtree (Root Device)...After reading.
[DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
[DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
[DEBUG] APIC: 00
[DEBUG] APIC: 02
[DEBUG] APIC: 06
[DEBUG] APIC: 04
[DEBUG] DOMAIN: 00000000 child on link 0 GPIO: 0
[SPEW ] DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
[SPEW ] DOMAIN: 00000000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
[SPEW ] DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000200
[DEBUG] GPIO: 0
[DEBUG] PCI: 00:00:00.0
[SPEW ] PCI: 00:00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
[SPEW ] PCI: 00:00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
[SPEW ] PCI: 00:00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
[SPEW ] PCI: 00:00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
[SPEW ] PCI: 00:00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
[SPEW ] PCI: 00:00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
[SPEW ] PCI: 00:00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
[SPEW ] PCI: 00:00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
[SPEW ] PCI: 00:00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
[SPEW ] PCI: 00:00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
[SPEW ] PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
[SPEW ] PCI: 00:00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
[SPEW ] PCI: 00:00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
[SPEW ] PCI: 00:00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
[SPEW ] PCI: 00:00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
[SPEW ] PCI: 00:00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
[SPEW ] PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
[SPEW ] PCI: 00:00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
[SPEW ] PCI: 00:00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
[SPEW ] PCI: 00:00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
[SPEW ] PCI: 00:00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
[SPEW ] PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
[SPEW ] PCI: 00:00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
[SPEW ] PCI: 00:00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
[SPEW ] PCI: 00:00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
[SPEW ] PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
[SPEW ] PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
[DEBUG] PCI: 00:00:02.0
[SPEW ] PCI: 00:00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
[SPEW ] PCI: 00:00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
[SPEW ] PCI: 00:00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
[DEBUG] PCI: 00:00:14.0 child on link 0 USB0 port 0
[SPEW ] PCI: 00:00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
[DEBUG] USB0 port 0 child on link 0 USB2 port 0
[DEBUG] USB2 port 0
[DEBUG] USB2 port 1
[DEBUG] USB2 port 2
[DEBUG] USB2 port 3
[DEBUG] USB2 port 4
[DEBUG] USB2 port 5
[DEBUG] USB2 port 6
[DEBUG] USB2 port 7
[DEBUG] USB2 port 8
[DEBUG] USB2 port 9
[DEBUG] USB3 port 0
[DEBUG] USB3 port 1
[DEBUG] USB3 port 2
[DEBUG] USB3 port 3
[DEBUG] PCI: 00:00:14.2
[DEBUG] PCI: 00:00:15.0
[DEBUG] PCI: 00:00:15.2
[SPEW ] PCI: 00:00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:15.3
[SPEW ] PCI: 00:00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:16.0
[SPEW ] PCI: 00:00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:19.0
[SPEW ] PCI: 00:00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:19.1
[SPEW ] PCI: 00:00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:19.2
[DEBUG] PCI: 00:00:1a.0
[SPEW ] PCI: 00:00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:1c.0 child on link 0 PCI: 00:01:00.0
[SPEW ] PCI: 00:00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
[SPEW ] PCI: 00:00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
[SPEW ] PCI: 00:00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
[DEBUG] PCI: 00:01:00.0
[SPEW ] PCI: 00:01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:1c.6 child on link 0 PCI: 00:02:00.0
[SPEW ] PCI: 00:00:1c.6 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
[SPEW ] PCI: 00:00:1c.6 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
[SPEW ] PCI: 00:00:1c.6 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
[DEBUG] PCI: 00:02:00.0
[SPEW ] PCI: 00:02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
[SPEW ] PCI: 00:02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
[SPEW ] PCI: 00:02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
[DEBUG] PCI: 00:00:1e.0
[SPEW ] PCI: 00:00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
[SPEW ] PCI: 00:00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
[DEBUG] PCI: 00:00:1e.1
[DEBUG] PCI: 00:00:1e.2
[SPEW ] PCI: 00:00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
[DEBUG] PCI: 00:00:1f.0 child on link 0 PNP: 002e.0
[SPEW ] PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
[SPEW ] PCI: 00:00:1f.0 resource base 200 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
[SPEW ] PCI: 00:00:1f.0 resource base a00 size 80 align 0 gran 0 limit 0 flags c0000100 index 88
[SPEW ] PCI: 00:00:1f.0 resource base 3f0 size 10 align 0 gran 0 limit 0 flags c0000100 index 8c
[SPEW ] PCI: 00:00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
[SPEW ] PCI: 00:00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
[DEBUG] PNP: 002e.0
[DEBUG] PNP: 002e.1
[SPEW ] PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
[SPEW ] PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
[SPEW ] PNP: 002e.1 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index f0
[DEBUG] PNP: 002e.4
[SPEW ] PNP: 002e.4 resource base a40 size 8 align 3 gran 3 limit fff flags c0000100 index 60
[SPEW ] PNP: 002e.4 resource base a30 size 8 align 3 gran 3 limit fff flags c0000100 index 62
[SPEW ] PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
[DEBUG] PNP: 002e.5
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit fff flags 100 index 60
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit fff flags 100 index 62
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PNP: 002e.6
[SPEW ] PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PNP: 002e.7
[SPEW ] PNP: 002e.7 resource base a10 size 4 align 2 gran 2 limit fff flags c0000100 index 60
[SPEW ] PNP: 002e.7 resource base a00 size 8 align 3 gran 3 limit fff flags c0000100 index 62
[SPEW ] PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[DEBUG] PNP: 002e.a
[SPEW ] PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
[SPEW ] PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PCI: 00:00:1f.2
[SPEW ] PCI: 00:00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
[SPEW ] PCI: 00:00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
[DEBUG] PCI: 00:00:1f.3
[SPEW ] PCI: 00:00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
[SPEW ] PCI: 00:00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
[DEBUG] PCI: 00:00:1f.4
[SPEW ] PCI: 00:00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
[SPEW ] PCI: 00:00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
[DEBUG] PCI: 00:00:1f.5
[SPEW ] PCI: 00:00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
[SPEW ] PCI: 00:00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
[SPEW ] PCI: 00:00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 00:01:00.0 10 * [0x0 - 0x3fff] mem
[DEBUG] PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG] PCI: 00:00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:02:00.0 10 * [0x0 - 0xff] io
[DEBUG] PCI: 00:00:1c.6 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:00:1c.6 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 00:02:00.0 20 * [0x0 - 0x3fff] mem
[DEBUG] PCI: 00:02:00.0 18 * [0x4000 - 0x4fff] mem
[DEBUG] PCI: 00:00:1c.6 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000200 limit 000002ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 00000a00 limit 00000a7f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 8c base 000003f0 limit 000003ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 90 base 00000080 limit 0000008f io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 000003f8 limit 000003ff io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.4 60 base 00000a40 limit 00000a47 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.4 62 base 00000a30 limit 00000a37 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.7 60 base 00000a10 limit 00000a13 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.7 62 base 00000a00 limit 00000a07 io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 01 base 00001800 limit 000018ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 800, Tag: 100
[INFO ] * Base: 1900, Size: d6a0, Tag: 100
[INFO ] * Base: efc0, Size: 1040, Tag: 100
[DEBUG] PCI: 00:00:1c.6 1c * [0x2000 - 0x2fff] limit: 2fff io
[DEBUG] PCI: 00:00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base fedc0000 limit feddffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base feda0000 limit feda0fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base feda1000 limit feda1fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fb000000 limit fb000fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base fec00000 limit fecfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed92000 limit fed92fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base fed85000 limit fed85fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0e base fed86000 limit fed86fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0f base fed87000 limit fed87fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 10 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 11 base c0000000 limit cfffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 17 base 77000000 limit 803fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 00 base ff000000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200
[INFO ] * Base: d0000000, Size: 10000000, Tag: 200
[INFO ] * Base: 27fc00000, Size: 7d80400000, Tag: 200
[DEBUG] PCI: 00:00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
[DEBUG] PCI: 00:00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
[DEBUG] PCI: 00:00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
[DEBUG] PCI: 00:00:1c.6 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
[DEBUG] PCI: 00:00:1f.3 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem
[DEBUG] PCI: 00:00:14.0 10 * [0x80700000 - 0x8070ffff] limit: 8070ffff mem
[DEBUG] PCI: 00:00:1f.3 10 * [0x80710000 - 0x80713fff] limit: 80713fff mem
[DEBUG] PCI: 00:00:15.2 10 * [0x80714000 - 0x80714fff] limit: 80714fff mem
[DEBUG] PCI: 00:00:15.3 10 * [0x80715000 - 0x80715fff] limit: 80715fff mem
[DEBUG] PCI: 00:00:16.0 10 * [0x80716000 - 0x80716fff] limit: 80716fff mem
[DEBUG] PCI: 00:00:19.0 10 * [0x80717000 - 0x80717fff] limit: 80717fff mem
[DEBUG] PCI: 00:00:19.1 10 * [0x80718000 - 0x80718fff] limit: 80718fff mem
[DEBUG] PCI: 00:00:1a.0 10 * [0x80719000 - 0x80719fff] limit: 80719fff mem
[DEBUG] PCI: 00:00:1e.0 18 * [0x8071a000 - 0x8071afff] limit: 8071afff mem
[DEBUG] PCI: 00:00:1e.2 10 * [0x8071b000 - 0x8071bfff] limit: 8071bfff mem
[DEBUG] PCI: 00:00:1f.5 10 * [0x8071c000 - 0x8071cfff] limit: 8071cfff mem
[DEBUG] PCI: 00:00:1f.4 10 * [0x8071d000 - 0x8071d0ff] limit: 8071d0ff mem
[DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[DEBUG] PCI: 00:01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
[DEBUG] PCI: 00:02:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
[DEBUG] PCI: 00:02:00.0 18 * [0x80504000 - 0x80504fff] limit: 80504fff mem
[DEBUG] PCI: 00:02:00.0 20 * [0x80500000 - 0x80503fff] limit: 80503fff mem
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[SPEW ] Root Device assign_resources, segment group 0 bus 0
[SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0
[DEBUG] PCI: 00:00:02.0 10 <- [0x0000000081000000 - 0x0000000081ffffff] size 0x01000000 gran 0x18 mem64
[DEBUG] PCI: 00:00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:00:14.0 10 <- [0x0000000080700000 - 0x000000008070ffff] size 0x00010000 gran 0x10 mem64
[SPEW ] PCI: 00:00:14.0 assign_resources, segment group 0 bus 0
[SPEW ] PCI: 00:00:14.0 assign_resources, segment group 0 bus 0 done
[DEBUG] PCI: 00:00:15.2 10 <- [0x0000000080714000 - 0x0000000080714fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:15.3 10 <- [0x0000000080715000 - 0x0000000080715fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:16.0 10 <- [0x0000000080716000 - 0x0000000080716fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:19.0 10 <- [0x0000000080717000 - 0x0000000080717fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:19.1 10 <- [0x0000000080718000 - 0x0000000080718fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1a.0 10 <- [0x0000000080719000 - 0x0000000080719fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1c.0 20 <- [0x0000000080400000 - 0x00000000804fffff] size 0x00100000 gran 0x14 seg 00 bumem
[SPEW ] PCI: 00:00:1c.0 assign_resources, segment group 0 bus 1
[DEBUG] PCI: 00:01:00.0 10 <- [0x0000000080400000 - 0x0000000080403fff] size 0x00004000 gran 0x0e mem64
[SPEW ] PCI: 00:00:1c.0 assign_resources, segment group 0 bus 1 done
[DEBUG] PCI: 00:00:1c.6 1c <- [0x0000000000002000 - 0x0000000000002fff] size 0x00001000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1c.6 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1c.6 20 <- [0x0000000080500000 - 0x00000000805fffff] size 0x00100000 gran 0x14 seg 00 bumem
[SPEW ] PCI: 00:00:1c.6 assign_resources, segment group 0 bus 2
[DEBUG] PCI: 00:02:00.0 10 <- [0x0000000000002000 - 0x00000000000020ff] size 0x00000100 gran 0x08 io
[DEBUG] PCI: 00:02:00.0 18 <- [0x0000000080504000 - 0x0000000080504fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:02:00.0 20 <- [0x0000000080500000 - 0x0000000080503fff] size 0x00004000 gran 0x0e mem64
[SPEW ] PCI: 00:00:1c.6 assign_resources, segment group 0 bus 2 done
[DEBUG] PCI: 00:00:1e.0 18 <- [0x000000008071a000 - 0x000000008071afff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:00:1e.2 10 <- [0x000000008071b000 - 0x000000008071bfff] size 0x00001000 gran 0x0c mem64
[SPEW ] PCI: 00:00:1f.0 assign_resources, segment group 0 bus 0
[DEBUG] PNP: 002e.1 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.1 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 002e.1 f0 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 002e.4 60 <- [0x0000000000000a40 - 0x0000000000000a47] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.4 62 <- [0x0000000000000a30 - 0x0000000000000a37] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.4 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq
[SPEW ] PCI: 00:00:1f.0 assign_resources, segment group 0 bus 0 done
[DEBUG] LPC: enabling default decode range LPC_IOE_COMA_EN
[SPEW ] LPC: Trying to open IO window from a40 size 8
[ERROR] LPC: Cannot open IO window: a40 size 8
[ERROR] No more IO windows
[SPEW ] LPC: Trying to open IO window from a30 size 8
[ERROR] LPC: Cannot open IO window: a30 size 8
[ERROR] No more IO windows
[DEBUG] PCI: 00:00:1f.3 10 <- [0x0000000080710000 - 0x0000000080713fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1f.3 20 <- [0x0000000080600000 - 0x00000000806fffff] size 0x00100000 gran 0x14 mem64
[DEBUG] PCI: 00:00:1f.4 10 <- [0x000000008071d000 - 0x000000008071d0ff] size 0x00000100 gran 0x08 mem64
[DEBUG] PCI: 00:00:1f.5 10 <- [0x000000008071c000 - 0x000000008071cfff] size 0x00001000 gran 0x0c mem
[SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0 done
[SPEW ] Root Device assign_resources, segment group 0 bus 0 done
[INFO ] Done setting resources.
[SPEW ] Show resources in subtree (Root Device)...After assigning values.
[DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
[DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
[DEBUG] APIC: 00
[DEBUG] APIC: 02
[DEBUG] APIC: 06
[DEBUG] APIC: 04
[DEBUG] DOMAIN: 00000000 child on link 0 GPIO: 0
[SPEW ] DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
[SPEW ] DOMAIN: 00000000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
[SPEW ] DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000200
[DEBUG] GPIO: 0
[DEBUG] PCI: 00:00:00.0
[SPEW ] PCI: 00:00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
[SPEW ] PCI: 00:00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
[SPEW ] PCI: 00:00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
[SPEW ] PCI: 00:00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
[SPEW ] PCI: 00:00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
[SPEW ] PCI: 00:00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
[SPEW ] PCI: 00:00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
[SPEW ] PCI: 00:00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
[SPEW ] PCI: 00:00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
[SPEW ] PCI: 00:00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
[SPEW ] PCI: 00:00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
[SPEW ] PCI: 00:00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
[SPEW ] PCI: 00:00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
[SPEW ] PCI: 00:00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
[SPEW ] PCI: 00:00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
[SPEW ] PCI: 00:00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
[SPEW ] PCI: 00:00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
[SPEW ] PCI: 00:00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
[SPEW ] PCI: 00:00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
[SPEW ] PCI: 00:00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
[SPEW ] PCI: 00:00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
[SPEW ] PCI: 00:00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
[SPEW ] PCI: 00:00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
[SPEW ] PCI: 00:00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
[SPEW ] PCI: 00:00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
[SPEW ] PCI: 00:00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
[SPEW ] PCI: 00:00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
[DEBUG] PCI: 00:00:02.0
[SPEW ] PCI: 00:00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
[SPEW ] PCI: 00:00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
[SPEW ] PCI: 00:00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
[DEBUG] PCI: 00:00:14.0 child on link 0 USB0 port 0
[SPEW ] PCI: 00:00:14.0 resource base 80700000 size 10000 align 16 gran 16 limit 8070ffff flags 60000201 index 10
[DEBUG] USB0 port 0 child on link 0 USB2 port 0
[DEBUG] USB2 port 0
[DEBUG] USB2 port 1
[DEBUG] USB2 port 2
[DEBUG] USB2 port 3
[DEBUG] USB2 port 4
[DEBUG] USB2 port 5
[DEBUG] USB2 port 6
[DEBUG] USB2 port 7
[DEBUG] USB2 port 8
[DEBUG] USB2 port 9
[DEBUG] USB3 port 0
[DEBUG] USB3 port 1
[DEBUG] USB3 port 2
[DEBUG] USB3 port 3
[DEBUG] PCI: 00:00:14.2
[DEBUG] PCI: 00:00:15.0
[DEBUG] PCI: 00:00:15.2
[SPEW ] PCI: 00:00:15.2 resource base 80714000 size 1000 align 12 gran 12 limit 80714fff flags 60000201 index 10
[DEBUG] PCI: 00:00:15.3
[SPEW ] PCI: 00:00:15.3 resource base 80715000 size 1000 align 12 gran 12 limit 80715fff flags 60000201 index 10
[DEBUG] PCI: 00:00:16.0
[SPEW ] PCI: 00:00:16.0 resource base 80716000 size 1000 align 12 gran 12 limit 80716fff flags 60000201 index 10
[DEBUG] PCI: 00:00:19.0
[SPEW ] PCI: 00:00:19.0 resource base 80717000 size 1000 align 12 gran 12 limit 80717fff flags 60000201 index 10
[DEBUG] PCI: 00:00:19.1
[SPEW ] PCI: 00:00:19.1 resource base 80718000 size 1000 align 12 gran 12 limit 80718fff flags 60000201 index 10
[DEBUG] PCI: 00:00:19.2
[DEBUG] PCI: 00:00:1a.0
[SPEW ] PCI: 00:00:1a.0 resource base 80719000 size 1000 align 12 gran 12 limit 80719fff flags 60000201 index 10
[DEBUG] PCI: 00:00:1c.0 child on link 0 PCI: 00:01:00.0
[SPEW ] PCI: 00:00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
[SPEW ] PCI: 00:00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
[SPEW ] PCI: 00:00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
[DEBUG] PCI: 00:01:00.0
[SPEW ] PCI: 00:01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
[DEBUG] PCI: 00:00:1c.6 child on link 0 PCI: 00:02:00.0
[SPEW ] PCI: 00:00:1c.6 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
[SPEW ] PCI: 00:00:1c.6 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
[SPEW ] PCI: 00:00:1c.6 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20
[DEBUG] PCI: 00:02:00.0
[SPEW ] PCI: 00:02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
[SPEW ] PCI: 00:02:00.0 resource base 80504000 size 1000 align 12 gran 12 limit 80504fff flags 60000201 index 18
[SPEW ] PCI: 00:02:00.0 resource base 80500000 size 4000 align 14 gran 14 limit 80503fff flags 60000201 index 20
[DEBUG] PCI: 00:00:1e.0
[SPEW ] PCI: 00:00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
[SPEW ] PCI: 00:00:1e.0 resource base 8071a000 size 1000 align 12 gran 12 limit 8071afff flags 60000201 index 18
[DEBUG] PCI: 00:00:1e.1
[DEBUG] PCI: 00:00:1e.2
[SPEW ] PCI: 00:00:1e.2 resource base 8071b000 size 1000 align 12 gran 12 limit 8071bfff flags 60000201 index 10
[DEBUG] PCI: 00:00:1f.0 child on link 0 PNP: 002e.0
[SPEW ] PCI: 00:00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
[SPEW ] PCI: 00:00:1f.0 resource base 200 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
[SPEW ] PCI: 00:00:1f.0 resource base a00 size 80 align 0 gran 0 limit 0 flags c0000100 index 88
[SPEW ] PCI: 00:00:1f.0 resource base 3f0 size 10 align 0 gran 0 limit 0 flags c0000100 index 8c
[SPEW ] PCI: 00:00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
[SPEW ] PCI: 00:00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
[DEBUG] PNP: 002e.0
[DEBUG] PNP: 002e.1
[SPEW ] PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
[SPEW ] PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
[SPEW ] PNP: 002e.1 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index f0
[DEBUG] PNP: 002e.4
[SPEW ] PNP: 002e.4 resource base a40 size 8 align 3 gran 3 limit fff flags e0000100 index 60
[SPEW ] PNP: 002e.4 resource base a30 size 8 align 3 gran 3 limit fff flags e0000100 index 62
[SPEW ] PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
[DEBUG] PNP: 002e.5
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit fff flags 100 index 60
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit fff flags 100 index 62
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PNP: 002e.6
[SPEW ] PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PNP: 002e.7
[SPEW ] PNP: 002e.7 resource base a10 size 4 align 2 gran 2 limit fff flags c0000100 index 60
[SPEW ] PNP: 002e.7 resource base a00 size 8 align 3 gran 3 limit fff flags c0000100 index 62
[SPEW ] PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[DEBUG] PNP: 002e.a
[SPEW ] PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
[SPEW ] PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
[SPEW ] PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index f0
[DEBUG] PCI: 00:00:1f.2
[SPEW ] PCI: 00:00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
[SPEW ] PCI: 00:00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
[DEBUG] PCI: 00:00:1f.3
[SPEW ] PCI: 00:00:1f.3 resource base 80710000 size 4000 align 14 gran 14 limit 80713fff flags 60000201 index 10
[SPEW ] PCI: 00:00:1f.3 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60000201 index 20
[DEBUG] PCI: 00:00:1f.4
[SPEW ] PCI: 00:00:1f.4 resource base 8071d000 size 100 align 12 gran 8 limit 8071d0ff flags 60000201 index 10
[SPEW ] PCI: 00:00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
[DEBUG] PCI: 00:00:1f.5
[SPEW ] PCI: 00:00:1f.5 resource base 8071c000 size 1000 align 12 gran 12 limit 8071cfff flags 60000200 index 10
[SPEW ] PCI: 00:00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
[SPEW ] PCI: 00:00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 4308 ms
[INFO ] coreboot skipped calling FSP notify phase: 00000020.
[DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 7 ms
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 subsystem <- 8086/461c
[DEBUG] PCI: 00:00:00.0 cmd <- 06
[DEBUG] PCI: 00:00:02.0 subsystem <- 8086/46d1
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:14.0 subsystem <- 8086/54ed
[DEBUG] PCI: 00:00:14.0 cmd <- 02
[DEBUG] PCI: 00:00:15.2 subsystem <- 8086/54ea
[DEBUG] PCI: 00:00:15.2 cmd <- 02
[DEBUG] PCI: 00:00:15.3 subsystem <- 8086/54eb
[DEBUG] PCI: 00:00:15.3 cmd <- 02
[DEBUG] PCI: 00:00:16.0 subsystem <- 8086/54e0
[DEBUG] PCI: 00:00:16.0 cmd <- 02
[DEBUG] PCI: 00:00:19.0 subsystem <- 8086/54c5
[DEBUG] PCI: 00:00:19.0 cmd <- 02
[DEBUG] PCI: 00:00:19.1 subsystem <- 8086/54c6
[DEBUG] PCI: 00:00:19.1 cmd <- 02
[DEBUG] PCI: 00:00:1a.0 subsystem <- 8086/54c4
[DEBUG] PCI: 00:00:1a.0 cmd <- 06
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/54ba
[DEBUG] PCI: 00:00:1c.0 cmd <- 06
[DEBUG] PCI: 00:00:1c.6 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.6 subsystem <- 8086/54be
[DEBUG] PCI: 00:00:1c.6 cmd <- 07
[DEBUG] PCI: 00:00:1e.0 subsystem <- 8086/54a8
[DEBUG] PCI: 00:00:1e.0 cmd <- 06
[DEBUG] PCI: 00:00:1e.2 subsystem <- 8086/54aa
[DEBUG] PCI: 00:00:1e.2 cmd <- 02
[DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/5481
[DEBUG] PCI: 00:00:1f.0 cmd <- 407
[DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/54c8
[DEBUG] PCI: 00:00:1f.3 cmd <- 02
[DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/54a3
[DEBUG] PCI: 00:00:1f.4 cmd <- 03
[DEBUG] PCI: 00:00:1f.5 subsystem <- 8086/54a4
[DEBUG] PCI: 00:00:1f.5 cmd <- 406
[DEBUG] PCI: 00:01:00.0 cmd <- 02
[DEBUG] PCI: 00:02:00.0 cmd <- 03
[INFO ] done.
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 1 / 192 ms
[DEBUG] ME: Version: 16.50.0.1146
[DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 12 / 4 ms
[INFO ] Initializing devices...
[DEBUG] PCI: 00:00:00.0 init
[INFO ] CPU TDP = 6 Watts
[INFO ] CPU PL1 = 6 Watts
[INFO ] CPU PL2 = 25 Watts
[INFO ] CPU PL4 = 78 Watts
[DEBUG] PCI: 00:00:00.0 init finished in 14 msecs
[DEBUG] PCI: 00:00:02.0 init
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
[INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
[DEBUG] PCI: 00:00:02.0 init finished in 25 msecs
[DEBUG] PCI: 00:00:14.0 init
[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:15.2 init
[DEBUG] I2C bus 2 version 0x3230302a
[INFO ] DW I2C bus 2 at 0x80714000 (400 KHz)
[DEBUG] PCI: 00:00:15.2 init finished in 9 msecs
[DEBUG] PCI: 00:00:15.3 init
[DEBUG] I2C bus 3 version 0x3230302a
[INFO ] DW I2C bus 3 at 0x80715000 (400 KHz)
[DEBUG] PCI: 00:00:15.3 init finished in 9 msecs
[DEBUG] PCI: 00:00:16.0 init
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:19.0 init
[DEBUG] I2C bus 4 version 0x3230302a
[INFO ] DW I2C bus 4 at 0x80717000 (400 KHz)
[DEBUG] PCI: 00:00:19.0 init finished in 9 msecs
[DEBUG] PCI: 00:00:19.1 init
[DEBUG] I2C bus 5 version 0x3230302a
[INFO ] DW I2C bus 5 at 0x80718000 (400 KHz)
[DEBUG] PCI: 00:00:19.1 init finished in 9 msecs
[DEBUG] PCI: 00:00:1a.0 init
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
[DEBUG] PCI: 00:00:1c.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1c.0 init finished in 4 msecs
[DEBUG] PCI: 00:00:1c.6 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1c.6 init finished in 4 msecs
[DEBUG] PCI: 00:00:1f.0 init
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
[DEBUG] IOAPIC: ID = 0x00
[SPEW ] IOAPIC: Dumping registers
[SPEW ] reg 0x0000: 0x00000000
[SPEW ] reg 0x0001: 0x00770020
[SPEW ] reg 0x0002: 0x00000000
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
[SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x18 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x19 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x1f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x20 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x21 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x22 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x23 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x24 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x25 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x26 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x27 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x28 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x29 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x2f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x30 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x31 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x32 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x33 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x34 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x35 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x36 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x37 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x38 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x39 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x3f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x40 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x41 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x42 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x43 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x44 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x45 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x46 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x47 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x48 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x49 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x4f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x50 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x51 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x52 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x53 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x54 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x55 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x56 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x57 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x58 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x59 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x5f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x60 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x61 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x62 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x63 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x64 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x65 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x66 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x67 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x68 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x69 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6a value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6b value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6c value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6d value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6e value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x6f value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x70 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x71 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x72 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x73 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x74 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x75 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x76 value 0x00000000 0x00010000
[SPEW ] IOAPIC: vector 0x77 value 0x00000000 0x00010000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700
[DEBUG] PCI: 00:00:1f.0 init finished in 819 msecs
[DEBUG] PCI: 00:00:1f.2 init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:00:1f.2 init finished in 7 msecs
[DEBUG] PCI: 00:00:1f.3 init
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
[DEBUG] PCI: 00:00:1f.4 init
[DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs
[DEBUG] PCI: 00:01:00.0 init
[DEBUG] PCI: 00:01:00.0 init finished in 0 msecs
[DEBUG] PCI: 00:02:00.0 init
[INFO ] CBFS: Found 'rt8168-macaddress' @0x596c0 size 0x11 in mcache @0x76c0d204
[DEBUG] r8168: Resetting NIC...done
[DEBUG] r8168: Programming MAC Address...done
[DEBUG] PCI: 00:02:00.0 init finished in 18 msecs
[DEBUG] PNP: 002e.1 init
[DEBUG] PNP: 002e.1 init finished in 0 msecs
[DEBUG] PNP: 002e.4 init
[DEBUG] PNP: 002e.4 init finished in 0 msecs
[INFO ] Devices initialized
[SPEW ] Show all devs... After init.
[SPEW ] Root Device: enabled 1
[SPEW ] CPU_CLUSTER: 0: enabled 1
[SPEW ] DOMAIN: 00000000: enabled 1
[SPEW ] GPIO: 0: enabled 1
[SPEW ] PCI: 00:00:00.0: enabled 1
[SPEW ] PCI: 00:00:01.0: enabled 0
[SPEW ] PCI: 00:00:01.1: enabled 0
[SPEW ] PCI: 00:00:02.0: enabled 1
[SPEW ] PCI: 00:00:04.0: enabled 0
[SPEW ] PCI: 00:00:05.0: enabled 0
[SPEW ] PCI: 00:00:06.0: enabled 0
[SPEW ] PCI: 00:00:06.2: enabled 0
[SPEW ] PCI: 00:00:07.0: enabled 0
[SPEW ] PCI: 00:00:07.1: enabled 0
[SPEW ] PCI: 00:00:07.2: enabled 0
[SPEW ] PCI: 00:00:07.3: enabled 0
[SPEW ] PCI: 00:00:08.0: enabled 0
[SPEW ] PCI: 00:00:09.0: enabled 0
[SPEW ] PCI: 00:00:0a.0: enabled 0
[SPEW ] PCI: 00:00:0d.0: enabled 0
[SPEW ] PCI: 00:00:0d.1: enabled 0
[SPEW ] PCI: 00:00:0d.2: enabled 0
[SPEW ] PCI: 00:00:0d.3: enabled 0
[SPEW ] PCI: 00:00:0e.0: enabled 0
[SPEW ] PCI: 00:00:10.0: enabled 0
[SPEW ] PCI: 00:00:10.1: enabled 0
[SPEW ] PCI: 00:00:10.6: enabled 0
[SPEW ] PCI: 00:00:10.7: enabled 0
[SPEW ] PCI: 00:00:12.0: enabled 0
[SPEW ] PCI: 00:00:12.6: enabled 0
[SPEW ] PCI: 00:00:12.7: enabled 0
[SPEW ] PCI: 00:00:13.0: enabled 0
[SPEW ] PCI: 00:00:14.0: enabled 1
[SPEW ] PCI: 00:00:14.1: enabled 0
[SPEW ] PCI: 00:00:14.2: enabled 0
[SPEW ] PCI: 00:00:14.3: enabled 0
[SPEW ] PCI: 00:00:15.0: enabled 0
[SPEW ] PCI: 00:00:15.1: enabled 0
[SPEW ] PCI: 00:00:15.2: enabled 1
[SPEW ] PCI: 00:00:15.3: enabled 1
[SPEW ] PCI: 00:00:16.0: enabled 1
[SPEW ] PCI: 00:00:16.1: enabled 0
[SPEW ] PCI: 00:00:16.2: enabled 0
[SPEW ] PCI: 00:00:16.3: enabled 0
[SPEW ] PCI: 00:00:16.4: enabled 0
[SPEW ] PCI: 00:00:16.5: enabled 0
[SPEW ] PCI: 00:00:17.0: enabled 0
[SPEW ] PCI: 00:00:19.0: enabled 1
[SPEW ] PCI: 00:00:19.1: enabled 1
[SPEW ] PCI: 00:00:19.2: enabled 0
[SPEW ] PCI: 00:00:1a.0: enabled 1
[SPEW ] PCI: 00:00:1c.0: enabled 0
[SPEW ] PCI: 00:00:1c.1: enabled 0
[SPEW ] PCI: 00:00:1c.0: enabled 1
[SPEW ] PCI: 00:00:1c.3: enabled 0
[SPEW ] PCI: 00:00:1c.4: enabled 0
[SPEW ] PCI: 00:00:1c.5: enabled 0
[SPEW ] PCI: 00:00:1c.6: enabled 1
[SPEW ] PCI: 00:00:1c.7: enabled 0
[SPEW ] PCI: 00:00:1d.0: enabled 0
[SPEW ] PCI: 00:00:1d.1: enabled 0
[SPEW ] PCI: 00:00:1d.2: enabled 0
[SPEW ] PCI: 00:00:1d.3: enabled 0
[SPEW ] PCI: 00:00:1e.0: enabled 1
[SPEW ] PCI: 00:00:1e.1: enabled 0
[SPEW ] PCI: 00:00:1e.2: enabled 1
[SPEW ] PCI: 00:00:1e.3: enabled 0
[SPEW ] PCI: 00:00:1f.0: enabled 1
[SPEW ] PCI: 00:00:1f.1: enabled 0
[SPEW ] PCI: 00:00:1f.2: enabled 1
[SPEW ] PCI: 00:00:1f.3: enabled 1
[SPEW ] PCI: 00:00:1f.4: enabled 1
[SPEW ] PCI: 00:00:1f.5: enabled 1
[SPEW ] PCI: 00:00:1f.6: enabled 0
[SPEW ] PCI: 00:00:1f.7: enabled 0
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] GENERIC: 0.0: enabled 1
[SPEW ] GENERIC: 1.0: enabled 1
[SPEW ] USB0 port 0: enabled 0
[SPEW ] USB0 port 0: enabled 0
[SPEW ] PCI: 00:02:00.0: enabled 1
[SPEW ] PNP: 002e.0: enabled 0
[SPEW ] PNP: 002e.1: enabled 1
[SPEW ] PNP: 002e.4: enabled 1
[SPEW ] PNP: 002e.5: enabled 0
[SPEW ] PNP: 002e.6: enabled 0
[SPEW ] PNP: 002e.7: enabled 0
[SPEW ] PNP: 002e.a: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] USB2 port 0: enabled 0
[SPEW ] USB2 port 1: enabled 0
[SPEW ] USB2 port 2: enabled 0
[SPEW ] USB2 port 3: enabled 0
[SPEW ] USB2 port 4: enabled 0
[SPEW ] USB2 port 5: enabled 0
[SPEW ] USB2 port 6: enabled 0
[SPEW ] USB2 port 7: enabled 0
[SPEW ] USB2 port 8: enabled 0
[SPEW ] USB2 port 9: enabled 0
[SPEW ] USB3 port 0: enabled 0
[SPEW ] USB3 port 1: enabled 0
[SPEW ] USB3 port 2: enabled 0
[SPEW ] USB3 port 3: enabled 0
[SPEW ] APIC: 00: enabled 1
[SPEW ] APIC: 02: enabled 1
[SPEW ] APIC: 06: enabled 1
[SPEW ] APIC: 04: enabled 1
[SPEW ] PCI: 00:01:00.0: enabled 1
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 1 / 1602 ms
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00:02.0 final
[DEBUG] PCI: 00:00:16.0 final
[DEBUG] PCI: 00:00:1f.2 final
[DEBUG] PCI: 00:00:1f.4 final
[INFO ] Devices finalized
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 23 ms
[DEBUG] ME: HFSTS1 : 0x90000255
[DEBUG] ME: HFSTS2 : 0x30850106
[DEBUG] ME: HFSTS3 : 0x00000020
[DEBUG] ME: HFSTS4 : 0x00004000
[DEBUG] ME: HFSTS5 : 0x00000000
[DEBUG] ME: HFSTS6 : 0x00400002
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: SPI Protection Mode Enabled : NO
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: D0i3 Support : YES
[DEBUG] ME: Low Power State Enabled : NO
[DEBUG] ME: CPU Replaced : NO
[DEBUG] ME: CPU Replacement Valid : YES
[DEBUG] ME: Current Working State : 5
[DEBUG] ME: Current Operation State : 1
[DEBUG] ME: Current Operation Mode : 0
[DEBUG] ME: Error Code : 0
[DEBUG] ME: FPFs Committed : NO
[DEBUG] ME: Enhanced Debug Mode : NO
[DEBUG] ME: CPU Debug Disabled : YES
[DEBUG] ME: TXT Support : NO
[DEBUG] ME: Manufacturing Vars Locked : NO
[DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 144 ms
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x54ac0 size 0x4bb3 in mcache @0x76c0d1d8
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 769f3000.
[DEBUG] ACPI: * FACS
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * FACP
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] Found 1 CPU(s) with 4/4 physical/logical core(s) each.
[DEBUG] PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
[WARN ] Unknown min d_state for PCI: 00:1a.0
[WARN ] Unknown min d_state for PCI: 00:1f.4
[WARN ] Unknown min d_state for PCI: 00:1a.0
[WARN ] Unknown min d_state for PCI: 00:1f.4
[INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
[INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:00:1f.2
[INFO ] \_SB.PCI0.RP07.RLTK.RLTK: Realtek r8168 PCI: 00:02:00.0
[DEBUG] ACPI: * SSDT
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] ACPI: * LPIT
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * APIC
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] ACPI: * SPCR
[DEBUG] ACPI: added table 6/32, length now 84
[DEBUG] current = 769f9660
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 7/32, length now 92
[DEBUG] ACPI: added table 8/32, length now 100
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 9/32, length now 108
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 26528 bytes.
[DEBUG] smbios_write_tables: 769eb000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '24.05-707-gc64bf8155bc3-dirty'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[DEBUG] SMBIOS tables: 1333 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 193d
[DEBUG] Writing coreboot table at 0x76a17000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-00000000769eafff: RAM
[DEBUG] 4. 00000000769eb000-0000000076aa3fff: CONFIGURATION TABLES
[DEBUG] 5. 0000000076aa4000-0000000076bfcfff: RAMSTAGE
[DEBUG] 6. 0000000076bfd000-0000000076ffffff: CONFIGURATION TABLES
[DEBUG] 7. 0000000077000000-00000000803fffff: RESERVED
[DEBUG] 8. 00000000c0000000-00000000cfffffff: RESERVED
[DEBUG] 9. 00000000f8000000-00000000f9ffffff: RESERVED
[DEBUG] 10. 00000000fb000000-00000000fb000fff: RESERVED
[DEBUG] 11. 00000000fc800000-00000000fe7fffff: RESERVED
[DEBUG] 12. 00000000feb00000-00000000feb7ffff: RESERVED
[DEBUG] 13. 00000000fec00000-00000000fecfffff: RESERVED
[DEBUG] 14. 00000000fed40000-00000000fed6ffff: RESERVED
[DEBUG] 15. 00000000fed80000-00000000fed87fff: RESERVED
[DEBUG] 16. 00000000fed90000-00000000fed92fff: RESERVED
[DEBUG] 17. 00000000feda0000-00000000feda1fff: RESERVED
[DEBUG] 18. 00000000fedc0000-00000000feddffff: RESERVED
[DEBUG] 19. 00000000ff000000-00000000ffffffff: RESERVED
[DEBUG] 20. 0000000100000000-000000027fbfffff: RAM
[DEBUG] FMAP: area SMMSTORE found @ c10000 (262144 bytes)
[DEBUG] smm store: 4 # blocks with size 0x10000
[DEBUG] Wrote coreboot table at: 0x76a17000, 0x564 bytes, checksum 57a
[DEBUG] coreboot table: 1404 bytes.
[DEBUG] IMD ROOT 0. 0x76fff000 0x00001000
[DEBUG] IMD SMALL 1. 0x76ffe000 0x00001000
[DEBUG] FSP MEMORY 2. 0x76c4e000 0x003b0000
[DEBUG] CONSOLE 3. 0x76c0e000 0x00040000
[DEBUG] RO MCACHE 4. 0x76c0d000 0x00000388
[DEBUG] TIME STAMP 5. 0x76c0c000 0x00000910
[DEBUG] MEM INFO 6. 0x76c0b000 0x00000f48
[DEBUG] AFTER CAR 7. 0x76bfd000 0x0000e000
[DEBUG] RAMSTAGE 8. 0x76aa3000 0x0015a000
[DEBUG] REFCODE 9. 0x76a44000 0x0005f000
[DEBUG] SMM BACKUP 10. 0x76a34000 0x00010000
[DEBUG] SMM COMBUFFER11. 0x76a24000 0x00010000
[DEBUG] IGD OPREGION12. 0x76a1f000 0x00004203
[DEBUG] COREBOOT 13. 0x76a17000 0x00008000
[DEBUG] ACPI 14. 0x769f3000 0x00024000
[DEBUG] SMBIOS 15. 0x769eb000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x76ffec00 0x00000400
[DEBUG] FSP RUNTIME 1. 0x76ffebe0 0x00000004
[DEBUG] FMAP 2. 0x76ffeac0 0x0000010a
[DEBUG] POWER STATE 3. 0x76ffea60 0x00000044
[DEBUG] FSPM VERSION 4. 0x76ffea40 0x00000004
[DEBUG] ROMSTAGE 5. 0x76ffea20 0x00000004
[DEBUG] ROMSTG STCK 6. 0x76ffe960 0x000000a8
[DEBUG] ACPI GNVS 7. 0x76ffe920 0x00000038
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 5 / 523 ms
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
[DEBUG] 0x0000000077000000 - 0x000000008fffffff size 0x19000000 type 0
[DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1
[DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000027fbfffff size 0x17fc00000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[SPEW ] apic_id 0x0 call enable_fixed_mtrr()
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 6/6.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
[DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
[DEBUG] MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
[INFO ] LAPIC 0x6 in XAPIC mode.
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] LAPIC 0x4 in XAPIC mode.
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26f 0x0606060606060606
[SPEW ] apic_id 0x2 call enable_fixed_mtrr()
[SPEW ] apic_id 0x4 call enable_fixed_mtrr()
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x4 setup mtrr for CPU physical address size: 39 bits
[DEBUG] apic_id 0x2 setup mtrr for CPU physical address size: 39 bits
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26f 0x0606060606060606
[SPEW ] apic_id 0x6 call enable_fixed_mtrr()
[DEBUG] apic_id 0x6 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: TEMPORARY Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
[DEBUG] 0x0000000077000000 - 0x00000000feffffff size 0x88000000 type 0
[DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5
[DEBUG] 0x0000000100000000 - 0x000000027fbfffff size 0x17fc00000 type 6
[DEBUG] MTRR: default type WB/UC MTRR counts: 10/6.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
[DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
[DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5
[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled
[DEBUG] BS: BS_WRITE_TABLES exit times (exec / console): 213 / 337 ms
[INFO ] CBFS: Found 'fallback/payload' @0x164b00 size 0x13b325 in mcache @0x76c0d318
[DEBUG] Checking segment from ROM address 0xffdb4d2c
[DEBUG] Checking segment from ROM address 0xffdb4d48
[DEBUG] Loading segment from ROM address 0xffdb4d2c
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x00800000 memsize 0x1000000 srcaddr 0xffdb4d64 filesize 0x13b2ed
[DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000001000000 filesz: 0x000000000013b2ed
[DEBUG] using LZMA
[SPEW ] [ 0x00800000, 01800000, 0x01800000) <- ffdb4d64
[DEBUG] Loading segment from ROM address 0xffdb4d48
[DEBUG] Entry Point 0x0080168e
[SPEW ] Loaded segments
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 413 / 75 ms
[INFO ] coreboot skipped calling FSP notify phase: 00000040.
[INFO ] coreboot skipped calling FSP notify phase: 000000f0.
[DEBUG] BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 14 ms
[DEBUG] Finalizing chipset.
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] HECI: Sending End-of-Post
[INFO ] CSE: EOP requested action: continue boot
[WARN ] HECI: CSE device 16.1 is disabled
[WARN ] HECI: CSE device 16.2 is disabled
[WARN ] HECI: CSE device 16.3 is disabled
[WARN ] HECI: CSE device 16.4 is disabled
[WARN ] HECI: CSE device 16.5 is disabled
[DEBUG] BS: BS_PAYLOAD_BOOT entry times (exec / console): 3 / 47 ms
[DEBUG] mp_park_aps done after 0 msecs.
[DEBUG] Jumping to boot code at 0x0080168e(0x76a17000)
[SPEW ] CPU0: stack: 0x76ae3fc0 - 0x76ae5fc0, lowest used address 0x76ae5a10, stack used: 1456 bytes
3h3h
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