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@Gekkio
Created March 2, 2018 14:45
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Copyright (C) 2017 Joonas Javanainen <joonas.javanainen@gmail.com>
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in
; all copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
; Tests when interrupts are checked during the fetch cycle (M1)
(define (pulse-sclk)
(do
(set-output-value :sclk false)
(sleep-ns 100)
(sample-pins)
(set-output-value :sclk true)
(sleep-ns 100)
(sample-pins)))
; This function sets up a serial interrupt so that it can be triggered with a
; single sclk pulse
(define (prepare-test)
(do
(reset-avoid-bootrom)
; Use VRAM as stack to safely use the data bus at all times
; ld sp, $8fff
(inject-data 0x31)
(inject-data 0xff)
(inject-data 0x8f)
; ei
(inject-data 0xfb)
; ld a, $80
(inject-data 0x3e)
(inject-data 0x80)
; ldh (<SC), a
(inject-data 0xe0)
(inject-data 0x02)
(step-clock-edges 8)
; ld a, $08
(inject-data 0x3e)
(inject-data 0x08)
(set-output-value :sclk true)
(set-output-enable :sclk true)
(dotimes 7 (pulse-sclk))
; ldh (<IE), a
(inject-data 0xe0)
(inject-data 0xff)
(step-clock-edges 8)
; Output NOPs so we won't have to inject them manually
(set-output-value :data 0x00)
(set-output-enable :data 0xff)))
(define (assert-first-stack-push-cycle)
(do
(step-clock-edges 2)
(assert-pins :maddr 0x0ffe)
(step-clock-edges 6)))
(define (assert-second-stack-push-cycle)
(do
(step-clock-edges 2)
(assert-pins :maddr 0x0ffd)
(step-clock-edges 6)))
(do
(for 1 5 (lambda (n)
(do
(prepare-test)
(step-clock-edges n)
(pulse-sclk)
(step-clock-edges (- 8 n))
; Standard delay of 2 M-cycles
(step-clock-edges 16)
(assert-first-stack-push-cycle)
(assert-second-stack-push-cycle))))
(for 5 9 (lambda (n)
(do
(prepare-test)
(step-clock-edges n)
(pulse-sclk)
(step-clock-edges (- 8 n))
; Standard delay of 2 M-cycles
(step-clock-edges 16)
; This time there's one more M-cycle before the stack pushes
(step-clock-edges 8)
(assert-first-stack-push-cycle)
(assert-second-stack-push-cycle)))))
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