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FioraAeterna / gist:0f36e1c3d3252bc92e58
Created December 27, 2014 04:13
icache hashing
static inline u64 crccode(u32* src, int insts)
{
int i = 0;
u64 res = 0;
if (insts >= 4)
{
u64 val[2] = { *(u64*)&src[0], *(u64*)&src[2] };
src += 4;
insts -= 4;
while (insts >= 4)
@FioraAeterna
FioraAeterna / gist:0329ce18a51d734b6a54
Last active August 29, 2015 14:12
overflows?
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter.h b/Source/Core/Core/PowerPC/Interpreter/Interpreter.h
index 3afaaf9..74ca9c7 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter.h
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter.h
@@ -297,7 +297,8 @@ public:
static void RunTable59(UGeckoInstruction _instCode);
static void RunTable63(UGeckoInstruction _instCode);
- static u32 Helper_Carry(u32 _uValue1, u32 _uValue2);
+ static u32 Helper_Carry(u32 a, u32 b, u32 c);
@FioraAeterna
FioraAeterna / gist:2caa0fecbd29b2137c23
Created December 15, 2014 03:52
Dolphin: use memory operands wherever possibl
From 7df6919fc55d0f54ef9e8b87540a5b41718e7dc7 Mon Sep 17 00:00:00 2001
From: Fiora <fioraaeterna@gmail.com>
Date: Mon, 27 Oct 2014 04:04:00 -0700
Subject: [PATCH] JIT: use memory destination operands wherever possible
Avoids lots of redundant instructions in the case of destination
operands that will never be used again in the block.
---
Source/Core/Core/PowerPC/Jit64/Jit.h | 1 +
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 100 +++++++++++++++----------
@FioraAeterna
FioraAeterna / gist:22d813067a01ce396b65
Created December 15, 2014 03:45
peephole optimizer
commit 9fb92f192709341a5463a42da190c92425426de9
Author: Fiora <fioraaeterna@gmail.com>
Date: Tue Oct 21 21:03:26 2014 -0700
test
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.h b/Source/Core/Core/PowerPC/Jit64/Jit.h
index 4dfbe56..38c2845 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit.h
+++ b/Source/Core/Core/PowerPC/Jit64/Jit.h
@FioraAeterna
FioraAeterna / gist:b7d58f8c090f7b66ea17
Created October 22, 2014 05:13
peepholes
commit 89815a5a30bb14b2baf730c87e351b7fd2dae5ec
Author: Fiora <fioraaeterna@gmail.com>
Date: Tue Oct 21 21:03:26 2014 -0700
test
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.h b/Source/Core/Core/PowerPC/Jit64/Jit.h
index 4dfbe56..38c2845 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit.h
+++ b/Source/Core/Core/PowerPC/Jit64/Jit.h
@FioraAeterna
FioraAeterna / gist:36d1cbb60e8d1c542f02
Created October 3, 2014 20:38
Dolphin: Profile code size, weighted by code use
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp
index c99f707..4f82cda 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp
@@ -212,9 +212,9 @@ void Jit64::Init()
code_block.m_stats = &js.st;
code_block.m_gpa = &js.gpa;
code_block.m_fpa = &js.fpa;
- analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE);
+ //analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE);
@FioraAeterna
FioraAeterna / gist:7ce26c56f2ddcdcc3751
Created September 15, 2014 06:08
branch merging counts
Metroid Prime 3:
32:37:054 PowerPC\Jit64\Jit.cpp:627 E[COMMON]: 10: 52197226 // cmpli
32:37:054 PowerPC\Jit64\Jit.cpp:627 E[COMMON]: 11: 443703676 // cmpi
32:37:054 PowerPC\Jit64\Jit.cpp:627 E[COMMON]: 13: 13507073 // addic_rc
32:37:054 PowerPC\Jit64\Jit.cpp:627 E[COMMON]: 21: 76290045 // rlwinmx
32:37:054 PowerPC\Jit64\Jit.cpp:633 E[COMMON]: 31 0: 99337666 // cmp
32:37:054 PowerPC\Jit64\Jit.cpp:633 E[COMMON]: 31 28: 15334710 // andx
32:37:054 PowerPC\Jit64\Jit.cpp:633 E[COMMON]: 31 32: 62823187 // cmpl
32:37:054 PowerPC\Jit64\Jit.cpp:633 E[COMMON]: 31 60: 1573381 // andcx
32:37:054 PowerPC\Jit64\Jit.cpp:633 E[COMMON]: 31 104: 42410929 // negx
@FioraAeterna
FioraAeterna / gist:013521d9f27549c53a39
Created September 11, 2014 19:40
static u8 lut[] =
{
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
@FioraAeterna
FioraAeterna / gist:544a98afd2b04676b740
Created September 7, 2014 13:41
if (((next.OPCD == 16 /* bcx */) ||
((next.OPCD == 19) && (next.SUBOP10 == 528) /* bcctrx */) ||
((next.OPCD == 19) && (next.SUBOP10 == 16) /* bclrx */)))
{
if (next.BO & BO_DONT_DECREMENT_FLAG)
{
if (!(next.BO & BO_DONT_CHECK_CONDITION))
{
if ((next.BI >> 2) == crf)
return true;
@FioraAeterna
FioraAeterna / gist:4b2c4d2e635e6f4f83f7
Last active August 29, 2015 14:06
Dolphin optimization ideas

  1. Track which registers a block clobbers without using -- then, when linking, don't store those, because we don't need them. (do this with PPCAnalyst)

  2. Track which float registers don't need to be converted to doubles (i.e. are only used by single -precision ops that take single-precision input) and don't convert them. (do this with PPCAnalyst)

  3. Track which float registers don't need to be movddup'd to create a top half (for PS1), the avoid the redundant movddup where possible. In a PR

  4. Support movbe in loads (requires backpatcher modifications).