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| /* Write cartridge operation for MBC1 */ | |
| inline void mbc1_write(uint16_t addr, uint8_t data) { | |
| if (addr >= 0xA000 && addr < 0xC000) { | |
| /* 8KB RAM Bank 00-03, if any */ | |
| ram[addr - 0xA000 + 0x2000 * ram_bank] = data; | |
| } | |
| /*if (addr < 0x2000) { | |
| if (data) { | |
| ram_enable = 1; | |
| } else { | |
| ram_enable = 0; | |
| } | |
| }*/ else if (addr >= 0x2000 && addr < 0x4000) { | |
| /* ROM Bank Number */ | |
| data &= 0x1F; | |
| rom_bank = (rom_bank & 0xE0) | data; | |
| if (data == 0x00) { | |
| rom_bank |= 0x01; | |
| } | |
| } else if (addr < 0x6000) { | |
| /*RAM Bank Number - or - Upper Bits of ROM Bank Number */ | |
| if (rom_ram_mode) { | |
| /* ROM mode */ | |
| data &= 0x07; | |
| rom_bank = (rom_bank & 0x1F) | (data << 5); | |
| } else { | |
| /* RAM mode */ | |
| ram_bank = data & 0x03; | |
| } | |
| } else if (addr < 0x8000) { | |
| /* ROM/RAM Mode Select */ | |
| if (data) { | |
| /* Emable RAM Banking mode */ | |
| rom_ram_mode = 0; | |
| } else { | |
| /* Emable ROM Banking mode */ | |
| rom_ram_mode = 1; | |
| } | |
| } | |
| } |
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